[llvm] r215917 - [X86][Haswell][SchedModel] Add architecture specific scheduling models.

Quentin Colombet qcolombet at apple.com
Mon Aug 18 10:55:44 PDT 2014


Author: qcolombet
Date: Mon Aug 18 12:55:43 2014
New Revision: 215917

URL: http://llvm.org/viewvc/llvm-project?rev=215917&view=rev
Log:
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Other instructions.

<rdar://problem/15607571>

Modified:
    llvm/trunk/lib/Target/X86/X86SchedHaswell.td

Modified: llvm/trunk/lib/Target/X86/X86SchedHaswell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedHaswell.td?rev=215917&r1=215916&r2=215917&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedHaswell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedHaswell.td Mon Aug 18 12:55:43 2014
@@ -1536,4 +1536,13 @@ def : InstRW<[WritePShift], (instregex "
 // PSLL,PSRL DQ.
 def : InstRW<[WriteP5], (instregex "(V?)PS(R|L)LDQ(Y?)ri")>;
 
+//-- Other --//
+
+// EMMS.
+def WriteEMMS : SchedWriteRes<[]> {
+  let Latency = 13;
+  let NumMicroOps = 31;
+}
+def : InstRW<[WriteEMMS], (instregex "MMX_EMMS")>;
+
 } // SchedModel





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