[PATCH] Teach the AArch64 backend about half-precision floating point

[Oliver Stannard]

Tim's email, which isn't showing up in phabricator:

> Hi Oliver,
> 
> On 14 August 2014 16:35, Oliver Stannard <oliver.stannard at arm.com> wrote:
>> Would it be OK to simply remove all of the promotions to f32, leaving them to fail at instruction selection, or is there a better way to express that an operation is not supported?
> 
> I think that's probably the best we've got for now.
> 
>> Should I leave the promotions in for add, sub, div, mul & sqrt, or do you think it would it be better to be consistent?
> 
> I'd be happy if you left those in, actually. I have an ongoing cunning
> plan to get rid of @llvm.convert.to.fp16 in favour of fptrunc, and
> doing those promotions will be a necessary step along the way, I
> think.
> 
>>> So we want to be very careful in that area. If we really want to support half as a native type, we'll probably need to add libcalls for some operations.
>>
>> I'm not currently aware of any source language other than opencl which allows operations on the half type (ACLE promotes to float first), so adding libcalls seems like overkill at the moment.
> 
> Agreed. Quite a bit of work without much gain at the moment.
>
> Cheers.

http://reviews.llvm.org/D4879