[PATCH] [PATCH][SROA]Also slice the STORE when slicing a LOAD in AllocaSliceRewriter

[Hao Liu]

Hi chandlerc,

Hi,

When SROA AllocaSliceRewriter tries to slice a load, if the loaded value is stored directly, currently we'll generate some redundant IR like ZEXT, SHL, AND, OR.

For the example in my patch:
    %2 = load i64* %ref.tmp, align 8
    store i64 %2, i64* %1, align 4
The load will be sliced into two i32 loads, and such two i32 will be combined into a i64 by ZEXT, SHL, AND, OR, and then it will be stored. But if we slice the i64 store into two i32 store, such additional operations won't be necessary.

This patch tries to find out and slice such STORE when slicing a LOAD.

Review please.

Thanks,
-Hao

http://reviews.llvm.org/D4954

Files:
  lib/Transforms/Scalar/SROA.cpp
  test/Transforms/SROA/slice-load-store.ll
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