[llvm] r215716 - [AArch64] Narrow arguments passed in wrong position on the stack in
Amara Emerson
amara.emerson at arm.com
Fri Aug 15 07:29:57 PDT 2014
Author: aemerson
Date: Fri Aug 15 09:29:57 2014
New Revision: 215716
URL: http://llvm.org/viewvc/llvm-project?rev=215716&view=rev
Log:
[AArch64] Narrow arguments passed in wrong position on the stack in
big-endian mode.
Patch by Asiri Rathnayake.
Differential Revision: http://reviews.llvm.org/D4922
Added:
llvm/trunk/test/CodeGen/AArch64/arm64-aapcs-be.ll
Modified:
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=215716&r1=215715&r2=215716&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Fri Aug 15 09:29:57 2014
@@ -1779,7 +1779,7 @@ SDValue AArch64TargetLowering::LowerForm
} else { // VA.isRegLoc()
assert(VA.isMemLoc() && "CCValAssign is neither reg nor mem");
unsigned ArgOffset = VA.getLocMemOffset();
- unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8;
+ unsigned ArgSize = VA.getValVT().getSizeInBits() / 8;
uint32_t BEAlign = 0;
if (ArgSize < 8 && !Subtarget->isLittleEndian())
@@ -2321,7 +2321,7 @@ AArch64TargetLowering::LowerCall(CallLow
// common case. It should also work for fundamental types too.
uint32_t BEAlign = 0;
unsigned OpSize = Flags.isByVal() ? Flags.getByValSize() * 8
- : VA.getLocVT().getSizeInBits();
+ : VA.getValVT().getSizeInBits();
OpSize = (OpSize + 7) / 8;
if (!Subtarget->isLittleEndian() && !Flags.isByVal()) {
if (OpSize < 8)
Added: llvm/trunk/test/CodeGen/AArch64/arm64-aapcs-be.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-aapcs-be.ll?rev=215716&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-aapcs-be.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-aapcs-be.ll Fri Aug 15 09:29:57 2014
@@ -0,0 +1,24 @@
+; RUN: llc -mtriple=aarch64_be-none-eabi -fast-isel=false < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64_be-none-eabi -fast-isel=true < %s | FileCheck %s
+
+; Check narrow argument passing via stack - callee end
+define i32 @test_narrow_args_callee(i64 %x0, i64 %x1, i64 %x2, i64 %x3, i64 %x4, i64 %x5, i64 %x6, i64 %x7, i8 %c, i16 %s) #0 {
+entry:
+ %conv = zext i8 %c to i32
+ %conv1 = sext i16 %s to i32
+ %add = add nsw i32 %conv1, %conv
+; CHECK-LABEL: test_narrow_args_callee:
+; CHECK-DAG: ldrb w{{[0-9]}}, [sp, #7]
+; CHECK-DAG: ldr{{s?}}h w{{[0-9]}}, [sp, #14]
+ ret i32 %add
+}
+
+; Check narrow argument passing via stack - caller end
+define i32 @test_narrow_args_caller() #0 {
+entry:
+ %call = tail call i32 @test_narrow_args_callee(i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i8 8, i16 9)
+; CHECK-LABEL: test_narrow_args_caller:
+; CHECK-DAG: strh w{{[0-9]}}, [sp, #14]
+; CHECK-DAG: strb w{{[0-9]}}, [sp, #7]
+ ret i32 %call
+}
\ No newline at end of file
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