[llvm] r215366 - Fix typos:
Sylvestre Ledru
sylvestre at debian.org
Mon Aug 11 11:04:46 PDT 2014
Author: sylvestre
Date: Mon Aug 11 13:04:46 2014
New Revision: 215366
URL: http://llvm.org/viewvc/llvm-project?rev=215366&view=rev
Log:
Fix typos:
* libaries => libraries
* avaiable => available
Modified:
llvm/trunk/docs/CommandGuide/llvm-config.rst
llvm/trunk/lib/IR/LegacyPassManager.cpp
llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/trunk/lib/Target/Mips/Mips16ISelLowering.cpp
llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp
Modified: llvm/trunk/docs/CommandGuide/llvm-config.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-config.rst?rev=215366&r1=215365&r2=215366&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-config.rst (original)
+++ llvm/trunk/docs/CommandGuide/llvm-config.rst Mon Aug 11 13:04:46 2014
@@ -151,7 +151,7 @@ libraries. Useful "virtual" components
**all**
- Includes all LLVM libaries. The default if no components are specified.
+ Includes all LLVM libraries. The default if no components are specified.
Modified: llvm/trunk/lib/IR/LegacyPassManager.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/IR/LegacyPassManager.cpp?rev=215366&r1=215365&r2=215366&view=diff
==============================================================================
--- llvm/trunk/lib/IR/LegacyPassManager.cpp (original)
+++ llvm/trunk/lib/IR/LegacyPassManager.cpp Mon Aug 11 13:04:46 2014
@@ -1684,7 +1684,7 @@ void MPPassManager::addLowerLevelRequire
if (!FoundPass) {
FoundPass = RequiredPass;
// This should be guaranteed to add RequiredPass to the passmanager given
- // that we checked for an avaiable analysis above.
+ // that we checked for an available analysis above.
FPP->add(RequiredPass);
}
// Register P as the last user of FoundPass or RequiredPass.
Modified: llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp?rev=215366&r1=215365&r2=215366&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp Mon Aug 11 13:04:46 2014
@@ -131,7 +131,7 @@ void AArch64FrameLowering::eliminateCall
// FIXME: in-function stack adjustment for calls is limited to 24-bits
// because there's no guaranteed temporary register available.
//
- // ADD/SUB (immediate) has only LSL #0 and LSL #12 avaiable.
+ // ADD/SUB (immediate) has only LSL #0 and LSL #12 available.
// 1) For offset <= 12-bit, we use LSL #0
// 2) For 12-bit <= offset <= 24-bit, we use two instructions. One uses
// LSL #0, and the other uses LSL #12.
Modified: llvm/trunk/lib/Target/Mips/Mips16ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16ISelLowering.cpp?rev=215366&r1=215365&r2=215366&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Mips16ISelLowering.cpp Mon Aug 11 13:04:46 2014
@@ -27,7 +27,7 @@ using namespace llvm;
static cl::opt<bool> DontExpandCondPseudos16(
"mips16-dont-expand-cond-pseudo",
cl::init(false),
- cl::desc("Dont expand conditional move related "
+ cl::desc("Don't expand conditional move related "
"pseudos for Mips 16"),
cl::Hidden);
Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=215366&r1=215365&r2=215366&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Mon Aug 11 13:04:46 2014
@@ -2274,7 +2274,7 @@ SDValue MipsTargetLowering::lowerFP_TO_S
// an argument. Otherwise, passed in A1, A2, A3 and stack.
// f64 - Only passed in two aliased f32 registers if no int reg has been used
// yet to hold an argument. Otherwise, use A2, A3 and stack. If A1 is
-// not used, it must be shadowed. If only A3 is avaiable, shadow it and
+// not used, it must be shadowed. If only A3 is available, shadow it and
// go to stack.
//
// For vararg functions, all arguments are passed in A0, A1, A2, A3 and stack.
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp?rev=215366&r1=215365&r2=215366&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp Mon Aug 11 13:04:46 2014
@@ -27,7 +27,7 @@ using namespace llvm;
static cl::opt<int> UsePrecDivF32(
"nvptx-prec-divf32", cl::ZeroOrMore, cl::Hidden,
cl::desc("NVPTX Specifies: 0 use div.approx, 1 use div.full, 2 use"
- " IEEE Compliant F32 div.rnd if avaiable."),
+ " IEEE Compliant F32 div.rnd if available."),
cl::init(2));
static cl::opt<bool>
Modified: llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp?rev=215366&r1=215365&r2=215366&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp Mon Aug 11 13:04:46 2014
@@ -338,7 +338,7 @@ protected:
void setLoopLandBlock(MachineLoop *LoopRep, MachineBasicBlock *MBB = nullptr);
MachineBasicBlock *findNearestCommonPostDom(std::set<MachineBasicBlock *>&);
- /// This is work around solution for findNearestCommonDominator not avaiable
+ /// This is work around solution for findNearestCommonDominator not available
/// to post dom a proper fix should go to Dominators.h.
MachineBasicBlock *findNearestCommonPostDom(MachineBasicBlock *MBB1,
MachineBasicBlock *MBB2);
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