[llvm] r215083 - TableGen: Change { } to only accept bits<n> entries when n == 1.

[Pete Cooper]

Author: pete
Date: Thu Aug  7 00:46:57 2014
New Revision: 215083

URL: http://llvm.org/viewvc/llvm-project?rev=215083&view=rev
Log:
TableGen: Change { } to only accept bits<n> entries when n == 1.

Prior to this change, it was legal to do something like

  bits<2> opc = { 0, 1 };
  bits<2> opc2 = { 1, 0 };
  bits<2> a = { opc, opc2 };

This involved silently dropping bits from opc and opc2 which is very hard to debug.

Now the above test would be an error.  Having tested with an assert, none of LLVM/clang was relying on this behaviour.

Thanks to Adam Nemet for the above test.

Added:
    llvm/trunk/test/TableGen/BitsInit.td
Modified:
    llvm/trunk/lib/TableGen/Record.cpp

Modified: llvm/trunk/lib/TableGen/Record.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/TableGen/Record.cpp?rev=215083&r1=215082&r2=215083&view=diff
==============================================================================
--- llvm/trunk/lib/TableGen/Record.cpp (original)
+++ llvm/trunk/lib/TableGen/Record.cpp Thu Aug  7 00:46:57 2014
@@ -114,8 +114,11 @@ Init *BitRecTy::convertValue(IntInit *II
 
 Init *BitRecTy::convertValue(TypedInit *VI) {
   RecTy *Ty = VI->getType();
-  if (isa<BitRecTy>(Ty) || isa<BitsRecTy>(Ty) || isa<IntRecTy>(Ty))
+  if (isa<BitRecTy>(Ty))
     return VI;  // Accept variable if it is already of bit type!
+  if (auto *BitsTy = dyn_cast<BitsRecTy>(Ty))
+    // Accept only bits<1> expression.
+    return BitsTy->getNumBits() == 1 ? VI : nullptr;
   return nullptr;
 }
 

Added: llvm/trunk/test/TableGen/BitsInit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/BitsInit.td?rev=215083&view=auto
==============================================================================
--- llvm/trunk/test/TableGen/BitsInit.td (added)
+++ llvm/trunk/test/TableGen/BitsInit.td Thu Aug  7 00:46:57 2014
@@ -0,0 +1,22 @@
+
+// RUN: not llvm-tblgen %s 2>&1 > %t
+// RUN: FileCheck %s < %t
+
+def a {
+  bits<2> opc = { 0, 1 };
+  bits<2> opc2 = { 1, 0 };
+  bits<1> opc3 = { 1 };
+  bits<2> a = { opc, opc2 }; // error!
+  bits<2> b = { opc{0}, opc2{0} };
+  bits<2> c = { opc{1}, opc2{1} };
+  bits<2> c = { opc3{0}, opc3 };
+}
+
+// CHECK: def a {
+// CHECK:   bits<2> opc = { 0, 1 };
+// CHECK:   bits<2> opc2 = { 1, 0 };
+// CHECK:   bits<1> opc3 = { 1 };
+// CHECK:   bits<2> a = { ?, ? };
+// CHECK:   bits<2> b = { 1, 0 };
+// CHECK:   bits<2> c = { 1, 1 };
+// CHECK: }