[llvm] r214724 - Add features for PPC 4xx and e500/e500mc instructions.
Hal Finkel
hfinkel at anl.gov
Wed Aug 6 21:35:03 PDT 2014
----- Original Message -----
> From: "Joerg Sonnenberger" <joerg at bec.de>
> To: llvm-commits at cs.uiuc.edu
> Sent: Monday, August 4, 2014 10:47:38 AM
> Subject: [llvm] r214724 - Add features for PPC 4xx and e500/e500mc instructions.
>
> Author: joerg
> Date: Mon Aug 4 10:47:38 2014
> New Revision: 214724
>
> URL: http://llvm.org/viewvc/llvm-project?rev=214724&view=rev
> Log:
> Add features for PPC 4xx and e500/e500mc instructions.
> Move the test cases for them into separate files.
>
> Added:
> llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt
> llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt
> llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s
> llvm/trunk/test/MC/PowerPC/ppc64-encoding-e500.s
> Modified:
> llvm/trunk/lib/Target/PowerPC/PPC.td
> llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
> llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
> llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
> llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
> llvm/trunk/test/MC/PowerPC/ppc64-encoding-ext.s
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPC.td
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPC.td?rev=214724&r1=214723&r2=214724&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPC.td (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPC.td Mon Aug 4 10:47:38 2014
> @@ -88,6 +88,10 @@ def FeatureLDBRX : SubtargetFeature<
> "Enable the ldbrx
> instruction">;
> def FeatureBookE : SubtargetFeature<"booke", "IsBookE", "true",
> "Enable Book E
> instructions">;
> +def FeatureE500 : SubtargetFeature<"E500", "IsE500", "true",
I'd prefer to keep the capitalization convention uniform across all of the subtarget features. Currently, none of them are capitalized (which I believe matches other targets), so this should be "e500".
Thanks again,
Hal
> + "Enable E500/E500mc
> instructions">;
> +def FeaturePPC4xx : SubtargetFeature<"ppc4xx", "IsPPC4xx",
> "true",
> + "Enable PPC 4xx
> instructions">;
> def FeatureQPX : SubtargetFeature<"qpx","HasQPX", "true",
> "Enable QPX instructions">;
> def FeatureVSX : SubtargetFeature<"vsx","HasVSX", "true",
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=214724&r1=214723&r2=214724&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Mon Aug 4 10:47:38
> 2014
> @@ -629,6 +629,8 @@ def In32BitMode : Predicate<"!PPCSubTar
> def In64BitMode : Predicate<"PPCSubTarget->isPPC64()">;
> def IsBookE : Predicate<"PPCSubTarget->isBookE()">;
> def IsNotBookE : Predicate<"!PPCSubTarget->isBookE()">;
> +def IsPPC4xx : Predicate<"PPCSubTarget->isPPC4xx()">;
> +def IsE500 : Predicate<"PPCSubTarget->isE500()">;
>
> //===----------------------------------------------------------------------===//
> // PowerPC Multiclass Definitions.
> @@ -3123,13 +3125,15 @@ def RFI : XForm_0<19, 50, (outs), (ins),
> def RFCI : XForm_0<19, 51, (outs), (ins), "rfci", IIC_BrB, []>,
> Requires<[IsBookE]>;
>
> -def RFDI : XForm_0<19, 39, (outs), (ins), "rfdi", IIC_BrB, []>;
> -def RFMCI : XForm_0<19, 38, (outs), (ins), "rfmci", IIC_BrB, []>;
> +def RFDI : XForm_0<19, 39, (outs), (ins), "rfdi", IIC_BrB, []>,
> + Requires<[IsE500]>;
> +def RFMCI : XForm_0<19, 38, (outs), (ins), "rfmci", IIC_BrB, []>,
> + Requires<[IsE500]>;
>
> def MFDCR : XFXForm_1<31, 323, (outs gprc:$RT), (ins i32imm:$SPR),
> - "mfdcr $RT, $SPR", IIC_SprMFSPR>;
> + "mfdcr $RT, $SPR", IIC_SprMFSPR>,
> Requires<[IsPPC4xx]>;
> def MTDCR : XFXForm_1<31, 451, (outs), (ins gprc:$RT, i32imm:$SPR),
> - "mtdcr $SPR, $RT", IIC_SprMTSPR>;
> + "mtdcr $SPR, $RT", IIC_SprMTSPR>,
> Requires<[IsPPC4xx]>;
>
> //===----------------------------------------------------------------------===//
> // PowerPC Assembler Instruction Aliases
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=214724&r1=214723&r2=214724&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Mon Aug 4
> 10:47:38 2014
> @@ -136,6 +136,8 @@ void PPCSubtarget::initializeEnvironment
> HasPOPCNTD = false;
> HasLDBRX = false;
> IsBookE = false;
> + IsPPC4xx = false;
> + IsE500 = false;
> DeprecatedMFTB = false;
> DeprecatedDST = false;
> HasLazyResolverStubs = false;
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h?rev=214724&r1=214723&r2=214724&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h Mon Aug 4 10:47:38
> 2014
> @@ -97,6 +97,8 @@ protected:
> bool HasPOPCNTD;
> bool HasLDBRX;
> bool IsBookE;
> + bool IsE500;
> + bool IsPPC4xx;
> bool DeprecatedMFTB;
> bool DeprecatedDST;
> bool HasLazyResolverStubs;
> @@ -218,6 +220,8 @@ public:
> bool hasPOPCNTD() const { return HasPOPCNTD; }
> bool hasLDBRX() const { return HasLDBRX; }
> bool isBookE() const { return IsBookE; }
> + bool isPPC4xx() const { return IsPPC4xx; }
> + bool isE500() const { return IsE500; }
> bool isDeprecatedMFTB() const { return DeprecatedMFTB; }
> bool isDeprecatedDST() const { return DeprecatedDST; }
>
>
> Added: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt?rev=214724&view=auto
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt
> (added)
> +++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt
> Mon Aug 4 10:47:38 2014
> @@ -0,0 +1,6 @@
> +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown
> -mcpu=pwr7 | FileCheck %s
> +
> +# CHECK: mfdcr 3, 178
> +0x7c 0x72 0x2a 0x86
> +# CHECK: mtdcr 178, 3
> +0x7c 0x72 0x2b 0x86
>
> Added:
> llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt?rev=214724&view=auto
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt
> (added)
> +++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt
> Mon Aug 4 10:47:38 2014
> @@ -0,0 +1,7 @@
> +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown
> -mcpu=pwr7 | FileCheck %s
> +
> +# CHECK: rfdi
> +0x4c 0x00 0x00 0x4e
> +# CHECK: rfmci
> +0x4c 0x00 0x00 0x4c
> +
>
> Modified:
> llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt?rev=214724&r1=214723&r2=214724&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
> (original)
> +++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
> Mon Aug 4 10:47:38 2014
> @@ -2251,11 +2251,6 @@
> # CHECK: mtcrf 255, 2
> 0x7c 0x4f 0xf1 0x20
>
> -# CHECK: rfdi
> -0x4c 0x00 0x00 0x4e
> -# CHECK: rfmci
> -0x4c 0x00 0x00 0x4c
> -
> # CHECK: dss 3
> 0x7c 0x60 0x06 0x6c
> # CHECK: dssall
> @@ -2269,10 +2264,5 @@
> # CHECK: dststt 12, 11, 3
> 0x7e 0x6c 0x5a 0xec
>
> -# CHECK: mfdcr 3, 178
> -0x7c 0x72 0x2a 0x86
> -# CHECK: mtdcr 178, 3
> -0x7c 0x72 0x2b 0x86
> -
> # CHECK: tlbia
> 0x7c 0x00 0x02 0xe4
>
> Added: llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s?rev=214724&view=auto
> ==============================================================================
> --- llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s (added)
> +++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s Mon Aug 4
> 10:47:38 2014
> @@ -0,0 +1,11 @@
> +# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s
> | FileCheck -check-prefix=CHECK-BE %s
> +# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding
> %s | FileCheck -check-prefix=CHECK-LE %s
> +
> +# Instructions specific to the PowerPC 4xx embedded controllers:
> +
> +# CHECK-BE: mfdcr 3, 178 # encoding:
> [0x7c,0x72,0x2a,0x86]
> +# CHECK-LE: mfdcr 3, 178 # encoding:
> [0x86,0x2a,0x72,0x7c]
> + mfdcr 3,178
> +# CHECK-BE: mtdcr 178, 3 # encoding:
> [0x7c,0x72,0x2b,0x86]
> +# CHECK-LE: mtdcr 178, 3 # encoding:
> [0x86,0x2b,0x72,0x7c]
> + mtdcr 178,3
>
> Added: llvm/trunk/test/MC/PowerPC/ppc64-encoding-e500.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-e500.s?rev=214724&view=auto
> ==============================================================================
> --- llvm/trunk/test/MC/PowerPC/ppc64-encoding-e500.s (added)
> +++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-e500.s Mon Aug 4
> 10:47:38 2014
> @@ -0,0 +1,11 @@
> +# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s
> | FileCheck -check-prefix=CHECK-BE %s
> +# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding
> %s | FileCheck -check-prefix=CHECK-LE %s
> +
> +# Instructions specific to the e500 / e500mc cores:
> +
> +# CHECK-BE: rfdi # encoding:
> [0x4c,0x00,0x00,0x4e]
> +# CHECK-LE: rfdi # encoding:
> [0x4e,0x00,0x00,0x4c]
> + rfdi
> +# CHECK-BE: rfmci # encoding:
> [0x4c,0x00,0x00,0x4c]
> +# CHECK-LE: rfmci # encoding:
> [0x4c,0x00,0x00,0x4c]
> + rfmci
>
> Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding-ext.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-ext.s?rev=214724&r1=214723&r2=214724&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/PowerPC/ppc64-encoding-ext.s (original)
> +++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-ext.s Mon Aug 4
> 10:47:38 2014
> @@ -3586,14 +3586,6 @@
> # CHECK-LE: mtspr 275, 4 # encoding:
> [0xa6,0x43,0x93,0x7c]
> mtsprg3 %r4
>
> -# e500/e500mc instructions:
> -# CHECK-BE: rfdi # encoding:
> [0x4c,0x00,0x00,0x4e]
> -# CHECK-LE: rfdi # encoding:
> [0x4e,0x00,0x00,0x4c]
> - rfdi
> -# CHECK-BE: rfmci # encoding:
> [0x4c,0x00,0x00,0x4c]
> -# CHECK-LE: rfmci # encoding:
> [0x4c,0x00,0x00,0x4c]
> - rfmci
> -
> # Altivec Data Stream instruction:
> # CHECK-BE: dss 3 # encoding:
> [0x7c,0x60,0x06,0x6c]
> # CHECK-LE: dss 3 # encoding:
> [0x6c,0x06,0x60,0x7c]
> @@ -3614,14 +3606,6 @@
> # CHECK-LE: dststt 12, 11, 3 # encoding:
> [0xec,0x5a,0x6c,0x7e]
> dststt %r12, %r11, 3
>
> -# PPC 403 support
> -# CHECK-BE: mfdcr 3, 178 # encoding:
> [0x7c,0x72,0x2a,0x86]
> -# CHECK-LE: mfdcr 3, 178 # encoding:
> [0x86,0x2a,0x72,0x7c]
> - mfdcr 3,178
> -# CHECK-BE: mtdcr 178, 3 # encoding:
> [0x7c,0x72,0x2b,0x86]
> -# CHECK-LE: mtdcr 178, 3 # encoding:
> [0x86,0x2b,0x72,0x7c]
> - mtdcr 178,3
> -
> # CHECK-BE: tlbia # encoding:
> [0x7c,0x00,0x02,0xe4]
> # CHECK-LE: tlbia # encoding:
> [0xe4,0x02,0x00,0x7c]
> tlbia
>
>
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--
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory
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