[llvm] r214958 - ARM-MachO: materialize callee address correctly on v4t.

[Jonathan Roelofs]

On 8/6/14, 5:13 AM, Tim Northover wrote:
> Author: tnorthover
> Date: Wed Aug  6 06:13:06 2014
> New Revision: 214958
>
> URL: http://llvm.org/viewvc/llvm-project?rev=214958&view=rev
> Log:
> ARM-MachO: materialize callee address correctly on v4t.
>
> Added:
>      llvm/trunk/test/CodeGen/ARM/none-macho-v4t.ll
> Modified:
>      llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>
> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=214958&r1=214957&r2=214958&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Aug  6 06:13:06 2014
> @@ -1666,7 +1666,10 @@ ARMTargetLowering::LowerCall(TargetLower
>       if (isStub && Subtarget->isThumb1Only() && !Subtarget->hasV5TOps()) {
>         assert(Subtarget->isTargetMachO() && "WrapperPIC use on non-MachO?");
>         Callee = DAG.getNode(ARMISD::WrapperPIC, dl, getPointerTy(),
> -                           DAG.getTargetGlobalAddress(GV, dl, getPointerTy()));
> +                           DAG.getTargetGlobalAddress(GV, dl, getPointerTy(),
> +                                                      0, ARMII::MO_NONLAZY));
> +      Callee = DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), Callee,
> +                           MachinePointerInfo::getGOT(), false, false, true, 0);
>       } else if (Subtarget->isTargetCOFF()) {
>         assert(Subtarget->isTargetWindows() &&
>                "Windows is the only supported COFF target");
>
> Added: llvm/trunk/test/CodeGen/ARM/none-macho-v4t.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/none-macho-v4t.ll?rev=214958&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/none-macho-v4t.ll (added)
> +++ llvm/trunk/test/CodeGen/ARM/none-macho-v4t.ll Wed Aug  6 06:13:06 2014
> @@ -0,0 +1,21 @@
> +; RUN: llc -mtriple=thumb-none-macho -mcpu=arm7tdmi %s -o - | FileCheck %s
> +; RUN: llc -mtriple=thumb-none-macho -mcpu=arm7tdmi %s -filetype=obj -o /dev/null
> +
> +declare void @callee()
> +
> +define void @test_call() {
> +  ; BX can only take a register before v5t came along, so we must materialise
> +  ; the address properly.
> +; CHECK-LABEL: test_call:
> +; CHECK: ldr r[[CALLEE_STUB:[0-9]+]], [[LITPOOL:LCPI[0-9]+_[0-9]+]]
> +; CHECK: [[PC_LABEL:LPC[0-9]+_[0-9]+]]:
> +; CHECK-NEXT: add r[[CALLEE_STUB]], pc
> +; CHECK: ldr [[CALLEE:r[0-9]+]], [r[[CALLEE_STUB]]]
> +; CHECK: mov lr, pc
Since pc is always even, on return we'll end up in ARM mode instead of Thumb 
(where we started), which isn't going to work. Iain and I are working on a fix 
for this... just wanted to give a heads-up.

Cheers,
Jon
> +; CHECK: bx [[CALLEE]]
> +
> +; CHECK: [[LITPOOL]]:
> +; CHECK-NEXT: .long L_callee$non_lazy_ptr-([[PC_LABEL]]+4)
> +  call void @callee()
> +  ret void
> +}
>
>
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-- 
Jon Roelofs
jonathan at codesourcery.com
CodeSourcery / Mentor Embedded