[llvm] r214957 - [AArch64] Conditional selects are expensive on out-of-order cores.
James Molloy
james.molloy at arm.com
Wed Aug 6 03:42:18 PDT 2014
Author: jamesm
Date: Wed Aug 6 05:42:18 2014
New Revision: 214957
URL: http://llvm.org/viewvc/llvm-project?rev=214957&view=rev
Log:
[AArch64] Conditional selects are expensive on out-of-order cores.
Specifically Cortex-A57. This probably applies to Cyclone too but I haven't enabled it for that as I can't test it.
This gives ~4% improvement on SPEC 174.vpr, and ~1% in 471.omnetpp.
Modified:
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=214957&r1=214956&r2=214957&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Wed Aug 6 05:42:18 2014
@@ -477,6 +477,10 @@ AArch64TargetLowering::AArch64TargetLowe
setOperationAction(ISD::FROUND, Ty, Legal);
}
}
+
+ // Prefer likely predicted branches to selects on out-of-order cores.
+ if (Subtarget->isCortexA57())
+ PredictableSelectIsExpensive = true;
}
void AArch64TargetLowering::addTypeForNEON(EVT VT, EVT PromotedBitwiseVT) {
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