[llvm] r214892 - Optimize vector fabs of bitcasted constant integer values.

[Chandler Carruth]

On Tue, Aug 5, 2014 at 12:23 PM, Sanjay Patel <spatel at rotateright.com>
wrote:

> Sorry about that. Let me know if the patch below corrects all problems.
>

NP, just normal post commit review. =]


> 1. I don't think we can use 'CHECK-NEXT' in the ARM cases because the
> order of the moves to r0 and r1 are not fixed. We can't even use 'CHECK' to
> confirm both of the #0 and the #-2147483648 move instructions because
> plain 'CHECK' imposes ordering. Is there another directive that doesn't
> impose ordering?
>

CHECK-DAG is designed for this, although it has its own problems...


>
> 2. The 'CHECK-NOT' in the ARM cases was requested by Renato. Should the
> equivalent also go in the X86 tests?
>

It usually isn't needed when you can just check all of the instructions for
very small and focused functions (like these).

But I honestly didn't look at the ARM tests. I'll trust the folks who work
on the ARM backend there. I've mostly only touched the X86 backend.

3. The X86 cases are just one instruction + return, so I've added the
> CHECK-NEXT for 'retq' there.
>

Yep, this is about what I do.

I would also include the trailing ":" on the CHECK-LABEL (there are other
strings in the assembly that match just the name)


>
> 4. I don't think we need to regex the register names in any of these
> cases. The ABI specifies the return registers, so they are fixed.
>

Agreed. I only regex register names when they might (legitimately) not be
the return value.
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