[llvm] r214903 - [X86] Improve comments for r214888

Adam Nemet anemet at apple.com
Tue Aug 5 10:58:49 PDT 2014


Author: anemet
Date: Tue Aug  5 12:58:49 2014
New Revision: 214903

URL: http://llvm.org/viewvc/llvm-project?rev=214903&view=rev
Log:
[X86] Improve comments for r214888

A rebase somehow ate my comments. This restores them.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=214903&r1=214902&r2=214903&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Aug  5 12:58:49 2014
@@ -3803,6 +3803,9 @@ static bool isPSHUFLWMask(ArrayRef<int>
   return true;
 }
 
+/// \brief Return true if the mask specifies a shuffle of elements that is
+/// suitable for input to intralane (palignr) or interlane (valign) vector
+/// right-shift.
 static bool isAlignrMask(ArrayRef<int> Mask, MVT VT, bool InterLane) {
   unsigned NumElts = VT.getVectorNumElements();
   unsigned NumLanes = InterLane ? 1: VT.getSizeInBits()/128;
@@ -3869,8 +3872,8 @@ static bool isAlignrMask(ArrayRef<int> M
   return true;
 }
 
-/// isPALIGNRMask - Return true if the node specifies a shuffle of elements that
-/// is suitable for input to PALIGNR.
+/// \brief Return true if the node specifies a shuffle of elements that is
+/// suitable for input to PALIGNR.
 static bool isPALIGNRMask(ArrayRef<int> Mask, MVT VT,
                           const X86Subtarget *Subtarget) {
   if ((VT.is128BitVector() && !Subtarget->hasSSSE3()) ||
@@ -3881,8 +3884,8 @@ static bool isPALIGNRMask(ArrayRef<int>
   return isAlignrMask(Mask, VT, false);
 }
 
-/// isPALIGNRMask - Return true if the node specifies a shuffle of elements that
-/// is suitable for input to PALIGNR.
+/// \brief Return true if the node specifies a shuffle of elements that is
+/// suitable for input to VALIGN.
 static bool isVALIGNMask(ArrayRef<int> Mask, MVT VT,
                           const X86Subtarget *Subtarget) {
   // FIXME: Add AVX512VL.
@@ -4715,8 +4718,9 @@ static unsigned getShufflePSHUFLWImmedia
   return Mask;
 }
 
-/// getShufflePALIGNRImmediate - Return the appropriate immediate to shuffle
-/// the specified VECTOR_SHUFFLE mask with the PALIGNR instruction.
+/// \brief Return the appropriate immediate to shuffle the specified
+/// VECTOR_SHUFFLE mask with the PALIGNR (if InterLane is false) or with
+/// VALIGN (if Interlane is true) instructions.
 static unsigned getShuffleAlignrImmediate(ShuffleVectorSDNode *SVOp,
                                            bool InterLane) {
   MVT VT = SVOp->getSimpleValueType(0);
@@ -4741,12 +4745,14 @@ static unsigned getShuffleAlignrImmediat
   return (Val - i) * EltSize;
 }
 
-/// getShufflePALIGNRImmediate - Return the appropriate immediate to shuffle
-/// the specified VECTOR_SHUFFLE mask with the PALIGNR instruction.
+/// \brief Return the appropriate immediate to shuffle the specified
+/// VECTOR_SHUFFLE mask with the PALIGNR instruction.
 static unsigned getShufflePALIGNRImmediate(ShuffleVectorSDNode *SVOp) {
   return getShuffleAlignrImmediate(SVOp, false);
 }
 
+/// \brief Return the appropriate immediate to shuffle the specified
+/// VECTOR_SHUFFLE mask with the VALIGN instruction.
 static unsigned getShuffleVALIGNImmediate(ShuffleVectorSDNode *SVOp) {
   return getShuffleAlignrImmediate(SVOp, true);
 }





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