[PATCH] optimize vector fabs of bitcasted constant integer values

[Sanjay Patel]

I know Renato is interested in the change to ARM codegen for the FNEG version of this optimization (not included in this patch) because it will change an existing test case. Here's ARM codegen for the 2 new FABS cases in this proposed patch.

I'm not sure what LLVM policy is for repeating codegen testcases per architecture, but if that's considered a good thing, I can add these to codegen/ARM:

Using:
$ ./llc -o - vec_fabs.ll -march=arm -mcpu=cortex-a8 -mattr=+neon

We get:

  _fabs_v2f32_1:                          @ @fabs_v2f32_1
  @ BB#0:
   	mvn	r0, #0
   	mov	r1, #0
   	vmov	d16, r1, r0
   	vabs.f32	d16, d16
   	vmov	r0, r1, d16
   	bx	lr
   
  _fabs_v2f32_2:                          @ @fabs_v2f32_2
  @ BB#0:
   	mov	r0, #0
   	mvn	r1, #0
   	vmov	d16, r1, r0
   	vabs.f32	d16, d16
   	vmov	r0, r1, d16
   	bx	lr
   
After the optimization, this would become:

   _fabs_v2f32_1:                          @ @fabs_v2f32_1
   @ BB#0:
   	mov	r0, #0
   	mvn	r1, #-2147483648
   	mov	pc, lr
   
   _fabs_v2f32_2:                          @ @fabs_v2f32_2
   @ BB#0:
   	mvn	r0, #-2147483648
   	mov	r1, #0
   	mov	pc, lr

http://reviews.llvm.org/D4785