[llvm] r214875 - Add accessors for the PPC 403 bank registers.
Joerg Sonnenberger
joerg at bec.de
Tue Aug 5 08:45:15 PDT 2014
Author: joerg
Date: Tue Aug 5 10:45:15 2014
New Revision: 214875
URL: http://llvm.org/viewvc/llvm-project?rev=214875&view=rev
Log:
Add accessors for the PPC 403 bank registers.
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=214875&r1=214874&r2=214875&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Tue Aug 5 10:45:15 2014
@@ -3304,6 +3304,15 @@ foreach BATR = 0-3 in {
Requires<[IsPPC6xx]>;
}
+foreach BR = 0-7 in {
+ def : InstAlias<"mfbr"#BR#" $Rx",
+ (MFDCR gprc:$Rx, !add(BR, 0x80))>,
+ Requires<[IsPPC4xx]>;
+ def : InstAlias<"mtbr"#BR#" $Rx",
+ (MTDCR gprc:$Rx, !add(BR, 0x80))>,
+ Requires<[IsPPC4xx]>;
+}
+
def : InstAlias<"mtdccr $Rx", (MTSPR 1018, gprc:$Rx)>, Requires<[IsPPC4xx]>;
def : InstAlias<"mfdccr $Rx", (MFSPR gprc:$Rx, 1018)>, Requires<[IsPPC4xx]>;
Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s?rev=214875&r1=214874&r2=214875&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-4xx.s Tue Aug 5 10:45:15 2014
@@ -110,3 +110,52 @@
# CHECK-BE: mtspr 991, 2 # encoding: [0x7c,0x5f,0xf3,0xa6]
# CHECK-LE: mtspr 991, 2 # encoding: [0xa6,0xf3,0x5f,0x7c]
mtsrr3 2
+
+# CHECK-BE: mfdcr 5, 128 # encoding: [0x7c,0xa0,0x22,0x86]
+# CHECK-LE: mfdcr 5, 128 # encoding: [0x86,0x22,0xa0,0x7c]
+ mfbr0 %r5
+# CHECK-BE: mtdcr 128, 5 # encoding: [0x7c,0xa0,0x23,0x86]
+# CHECK-LE: mtdcr 128, 5 # encoding: [0x86,0x23,0xa0,0x7c]
+ mtbr0 %r5
+# CHECK-BE: mfdcr 5, 129 # encoding: [0x7c,0xa1,0x22,0x86]
+# CHECK-LE: mfdcr 5, 129 # encoding: [0x86,0x22,0xa1,0x7c]
+ mfbr1 %r5
+# CHECK-BE: mtdcr 129, 5 # encoding: [0x7c,0xa1,0x23,0x86]
+# CHECK-LE: mtdcr 129, 5 # encoding: [0x86,0x23,0xa1,0x7c]
+ mtbr1 %r5
+# CHECK-BE: mfdcr 5, 130 # encoding: [0x7c,0xa2,0x22,0x86]
+# CHECK-LE: mfdcr 5, 130 # encoding: [0x86,0x22,0xa2,0x7c]
+ mfbr2 %r5
+# CHECK-BE: mtdcr 130, 5 # encoding: [0x7c,0xa2,0x23,0x86]
+# CHECK-LE: mtdcr 130, 5 # encoding: [0x86,0x23,0xa2,0x7c]
+ mtbr2 %r5
+# CHECK-BE: mfdcr 5, 131 # encoding: [0x7c,0xa3,0x22,0x86]
+# CHECK-LE: mfdcr 5, 131 # encoding: [0x86,0x22,0xa3,0x7c]
+ mfbr3 %r5
+# CHECK-BE: mtdcr 131, 5 # encoding: [0x7c,0xa3,0x23,0x86]
+# CHECK-LE: mtdcr 131, 5 # encoding: [0x86,0x23,0xa3,0x7c]
+ mtbr3 %r5
+# CHECK-BE: mfdcr 5, 132 # encoding: [0x7c,0xa4,0x22,0x86]
+# CHECK-LE: mfdcr 5, 132 # encoding: [0x86,0x22,0xa4,0x7c]
+ mfbr4 %r5
+# CHECK-BE: mtdcr 132, 5 # encoding: [0x7c,0xa4,0x23,0x86]
+# CHECK-LE: mtdcr 132, 5 # encoding: [0x86,0x23,0xa4,0x7c]
+ mtbr4 %r5
+# CHECK-BE: mfdcr 5, 133 # encoding: [0x7c,0xa5,0x22,0x86]
+# CHECK-LE: mfdcr 5, 133 # encoding: [0x86,0x22,0xa5,0x7c]
+ mfbr5 %r5
+# CHECK-BE: mtdcr 133, 5 # encoding: [0x7c,0xa5,0x23,0x86]
+# CHECK-LE: mtdcr 133, 5 # encoding: [0x86,0x23,0xa5,0x7c]
+ mtbr5 %r5
+# CHECK-BE: mfdcr 5, 134 # encoding: [0x7c,0xa6,0x22,0x86]
+# CHECK-LE: mfdcr 5, 134 # encoding: [0x86,0x22,0xa6,0x7c]
+ mfbr6 %r5
+# CHECK-BE: mtdcr 134, 5 # encoding: [0x7c,0xa6,0x23,0x86]
+# CHECK-LE: mtdcr 134, 5 # encoding: [0x86,0x23,0xa6,0x7c]
+ mtbr6 %r5
+# CHECK-BE: mfdcr 5, 135 # encoding: [0x7c,0xa7,0x22,0x86]
+# CHECK-LE: mfdcr 5, 135 # encoding: [0x86,0x22,0xa7,0x7c]
+ mfbr7 %r5
+# CHECK-BE: mtdcr 135, 5 # encoding: [0x7c,0xa7,0x23,0x86]
+# CHECK-LE: mtdcr 135, 5 # encoding: [0x86,0x23,0xa7,0x7c]
+ mtbr7 %r5
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