[llvm] r214848 - [FastIsel][AArch64] Fix previous commit r214844 (Don't perform sign-/zero-extension for function arguments that have already been sign-/zero-extended.)

[Juergen Ributzka]

Author: ributzka
Date: Tue Aug  5 02:31:30 2014
New Revision: 214848

URL: http://llvm.org/viewvc/llvm-project?rev=214848&view=rev
Log:
[FastIsel][AArch64] Fix previous commit r214844 (Don't perform sign-/zero-extension for function arguments that have already been sign-/zero-extended.)

The original code would fail for unsupported value types like i1, i8, and i16.
This fix changes the code to only create a sub-register copy for i64 value types
and all other types (i1/i8/i16/i32) just use the source register without any
modifications.

getRegClassFor() is now guarded by the i64 value type check, that guarantees
that we always request a register for a valid value type.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp?rev=214848&r1=214847&r2=214848&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp Tue Aug  5 02:31:30 2014
@@ -2443,17 +2443,15 @@ bool AArch64FastISel::SelectIntExt(const
   // Check if it is an argument and if it is already zero/sign-extended.
   if (const auto *Arg = dyn_cast<Argument>(Src)) {
     if ((isZExt && Arg->hasZExtAttr()) || (!isZExt && Arg->hasSExtAttr())) {
-      ResultReg = createResultReg(TLI.getRegClassFor(DestVT));
-      if (DestVT == MVT::i64)
+      if (DestVT == MVT::i64) {
+        ResultReg = createResultReg(TLI.getRegClassFor(DestVT));
         BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
                 TII.get(AArch64::SUBREG_TO_REG), ResultReg)
           .addImm(0)
           .addReg(SrcReg)
           .addImm(AArch64::sub_32);
-      else
-        BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
-                TII.get(TargetOpcode::COPY), ResultReg)
-          .addReg(SrcReg);
+      } else
+        ResultReg = SrcReg;
     }
   }