[PATCH] Add DAG combine for shl + add of constants.

[Matt Arsenault]

Do
     (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2)
    
This is already done for multiplies, but since multiplies
by powers of two are turned into shifts, we also need
to handle it here. This not happening is interfering with folding
some constant offsets into an addressing mode.
  
This might want checks for isLegalAddImmediate to avoid
transforming an add of a legal immediate with one that isn't.

http://reviews.llvm.org/D4768

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/AArch64/arm64-shifted-sext.ll
  test/CodeGen/R600/shl_add_constant.ll
  test/CodeGen/R600/trunc.ll
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