[polly] r214657 - Update the jscop tests and port them to isl codegen.

Johannes Doerfert jdoerfert at codeaurora.org
Sat Aug 2 18:48:49 PDT 2014


Author: jdoerfert
Date: Sat Aug  2 20:48:49 2014
New Revision: 214657

URL: http://llvm.org/viewvc/llvm-project?rev=214657&view=rev
Log:
Update the jscop tests and port them to isl codegen.

  The updated tests use a different context than the old ones did.
  Other than that only their path and the code generation we use
  changed.

Added:
    polly/trunk/test/Isl/CodeGen/MemAccess/
    polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset.ll
    polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset___%for.cond---%for.end.jscop
    polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset___%for.cond---%for.end.jscop.transformed
    polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple.ll
    polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple___%for.cond---%for.end.jscop
    polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple___%for.cond---%for.end.jscop.transformed
    polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md.ll
    polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop
    polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop.transformed+withconst
    polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop.transformed+withoutconst
    polly/trunk/test/Isl/CodeGen/MemAccess/simple.ll
    polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond---%for.end.jscop
    polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond---%for.end.jscop.transformed
    polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond4---%for.end14.jscop
    polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond4---%for.end14.jscop.transformed
    polly/trunk/test/Isl/CodeGen/MemAccess/simple_analyze.ll
Removed:
    polly/trunk/test/Cloog/CodeGen/MemAccess/

Added: polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset.ll?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset.ll (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset.ll Sat Aug  2 20:48:49 2014
@@ -0,0 +1,43 @@
+;RUN: opt %loadPolly -polly-import-jscop -polly-import-jscop-dir=%S -polly-import-jscop-postfix=transformed -polly-codegen-isl -instnamer < %s -S | FileCheck %s
+
+;int A[100];
+;
+;int codegen_constant_offset() {
+;  for (int i = 0; i < 12; i++)
+;    A[13] = A[i] + A[i-1];
+;
+;  return 0;
+;}
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
+target triple = "i386-pc-linux-gnu"
+
+ at A = common global [100 x i32] zeroinitializer, align 4
+
+define i32 @codegen_constant_offset() nounwind {
+entry:
+  br label %for.cond
+
+for.cond:                                         ; preds = %for.inc, %entry
+  %tmp1 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
+  %tmp = add i32 %tmp1, -1
+  %arrayidx4 = getelementptr [100 x i32]* @A, i32 0, i32 %tmp
+  %arrayidx = getelementptr [100 x i32]* @A, i32 0, i32 %tmp1
+  %exitcond = icmp ne i32 %tmp1, 12
+  br i1 %exitcond, label %for.body, label %for.end
+
+for.body:                                         ; preds = %for.cond
+  %tmp2 = load i32* %arrayidx, align 4
+  %tmp5 = load i32* %arrayidx4, align 4
+  %add = add nsw i32 %tmp2, %tmp5
+  store i32 %add, i32* getelementptr inbounds ([100 x i32]* @A, i32 0, i32 13), align 4
+  br label %for.inc
+
+for.inc:                                          ; preds = %for.body
+  %inc = add nsw i32 %tmp1, 1
+  br label %for.cond
+
+for.end:                                          ; preds = %for.cond
+  ret i32 0
+}
+; CHECK: load i32* getelementptr inbounds ([100 x i32]* @A, i64 0, i64 10)

Added: polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset___%for.cond---%for.end.jscop
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset___%25for.cond---%25for.end.jscop?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset___%for.cond---%for.end.jscop (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset___%for.cond---%for.end.jscop Sat Aug  2 20:48:49 2014
@@ -0,0 +1,25 @@
+{
+   "context" : "{  :  }",
+   "name" : "for.cond => for.end",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "read",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[i0] }"
+            },
+            {
+               "kind" : "read",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[-1 + i0] }"
+            },
+            {
+               "kind" : "write",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[13] }"
+            }
+         ],
+         "domain" : "{ Stmt_for_body[i0] : i0 >= 0 and i0 <= 11 }",
+         "name" : "Stmt_for_body",
+         "schedule" : "{ Stmt_for_body[i0] -> scattering[0, i0, 0] }"
+      }
+   ]
+}

Added: polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset___%for.cond---%for.end.jscop.transformed
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset___%25for.cond---%25for.end.jscop.transformed?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset___%for.cond---%for.end.jscop.transformed (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/codegen_constant_offset___%for.cond---%for.end.jscop.transformed Sat Aug  2 20:48:49 2014
@@ -0,0 +1,25 @@
+{
+   "context" : "{  :  }",
+   "name" : "for.cond => for.end",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "read",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[10] }"
+            },
+            {
+               "kind" : "read",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[-1 + i0] }"
+            },
+            {
+               "kind" : "write",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[13] }"
+            }
+         ],
+         "domain" : "{ Stmt_for_body[i0] : i0 >= 0 and i0 <= 11 }",
+         "name" : "Stmt_for_body",
+         "schedule" : "{ Stmt_for_body[i0] -> scattering[0, i0, 0] }"
+      }
+   ]
+}

Added: polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple.ll?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple.ll (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple.ll Sat Aug  2 20:48:49 2014
@@ -0,0 +1,43 @@
+;RUN: opt %loadPolly -polly-import-jscop -polly-import-jscop-dir=%S -polly-import-jscop-postfix=transformed -polly-codegen-isl -instnamer < %s -S | FileCheck %s
+
+;int A[100];
+;
+;int codegen_simple () {
+;  for (int i = 0; i < 12; i++)
+;    A[13] = A[i] + A[i-1];
+;
+;  return 0;
+;}
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
+target triple = "i386-pc-linux-gnu"
+
+ at A = common global [100 x i32] zeroinitializer, align 4
+
+define i32 @codegen_simple() nounwind {
+entry:
+  br label %for.cond
+
+for.cond:                                         ; preds = %for.inc, %entry
+  %tmp1 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
+  %tmp = add i32 %tmp1, -1
+  %arrayidx4 = getelementptr [100 x i32]* @A, i32 0, i32 %tmp
+  %arrayidx = getelementptr [100 x i32]* @A, i32 0, i32 %tmp1
+  %exitcond = icmp ne i32 %tmp1, 12
+  br i1 %exitcond, label %for.body, label %for.end
+
+for.body:                                         ; preds = %for.cond
+  %tmp2 = load i32* %arrayidx, align 4
+  %tmp5 = load i32* %arrayidx4, align 4
+  %add = add nsw i32 %tmp2, %tmp5
+  store i32 %add, i32* getelementptr inbounds ([100 x i32]* @A, i32 0, i32 13), align 4
+  br label %for.inc
+
+for.inc:                                          ; preds = %for.body
+  %inc = add nsw i32 %tmp1, 1
+  br label %for.cond
+
+for.end:                                          ; preds = %for.cond
+  ret i32 0
+}
+; CHECK: load i32* getelementptr inbounds ([100 x i32]* @A, i64 0, i64 0)

Added: polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple___%for.cond---%for.end.jscop
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple___%25for.cond---%25for.end.jscop?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple___%for.cond---%for.end.jscop (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple___%for.cond---%for.end.jscop Sat Aug  2 20:48:49 2014
@@ -0,0 +1,25 @@
+{
+   "context" : "{  :  }",
+   "name" : "for.cond => for.end",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "read",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[i0] }"
+            },
+            {
+               "kind" : "read",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[-1 + i0] }"
+            },
+            {
+               "kind" : "write",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[13] }"
+            }
+         ],
+         "domain" : "{ Stmt_for_body[i0] : i0 >= 0 and i0 <= 11 }",
+         "name" : "Stmt_for_body",
+         "schedule" : "{ Stmt_for_body[i0] -> scattering[0, i0, 0] }"
+      }
+   ]
+}

Added: polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple___%for.cond---%for.end.jscop.transformed
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple___%25for.cond---%25for.end.jscop.transformed?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple___%for.cond---%for.end.jscop.transformed (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple___%for.cond---%for.end.jscop.transformed Sat Aug  2 20:48:49 2014
@@ -0,0 +1,25 @@
+{
+   "context" : "{  :  }",
+   "name" : "for.cond => for.end",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "read",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[0] }"
+            },
+            {
+               "kind" : "read",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[-1 + i0] }"
+            },
+            {
+               "kind" : "write",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[13] }"
+            }
+         ],
+         "domain" : "{ Stmt_for_body[i0] : i0 >= 0 and i0 <= 11 }",
+         "name" : "Stmt_for_body",
+         "schedule" : "{ Stmt_for_body[i0] -> scattering[0, i0, 0] }"
+      }
+   ]
+}

Added: polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md.ll?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md.ll (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md.ll Sat Aug  2 20:48:49 2014
@@ -0,0 +1,74 @@
+;RUN: opt %loadPolly -polly-import-jscop -polly-import-jscop-dir=%S -polly-import-jscop-postfix=transformed+withconst -polly-codegen-isl < %s -S | FileCheck -check-prefix=WITHCONST %s
+;RUN: opt %loadPolly -polly-import-jscop -polly-import-jscop-dir=%S -polly-import-jscop-postfix=transformed+withoutconst -polly-codegen-isl < %s -S | FileCheck -check-prefix=WITHOUTCONST %s
+
+;int A[1040];
+;
+;int codegen_simple_md() {
+;  for (int i = 0; i < 32; ++i)
+;    for (int j = 0; j < 32; ++j)
+;      A[32*i+j] = 100;
+;
+;  return 0;
+;}
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
+target triple = "i386-pc-linux-gnu"
+
+ at A = common global [1040 x i32] zeroinitializer, align 4
+
+define i32 @codegen_simple_md() nounwind {
+entry:
+  br label %for.cond
+
+for.cond:                                         ; preds = %for.inc4, %entry
+  %i.0 = phi i32 [ 0, %entry ], [ %inc5, %for.inc4 ]
+  %exitcond1 = icmp ne i32 %i.0, 32
+  br i1 %exitcond1, label %for.body, label %for.end6
+
+for.body:                                         ; preds = %for.cond
+  br label %for.cond1
+
+for.cond1:                                        ; preds = %for.inc, %for.body
+  %j.0 = phi i32 [ 0, %for.body ], [ %inc, %for.inc ]
+  %exitcond = icmp ne i32 %j.0, 32
+  br i1 %exitcond, label %for.body3, label %for.end
+
+for.body3:                                        ; preds = %for.cond1
+  %mul = shl nsw i32 %i.0, 5
+  %add = add nsw i32 %mul, %j.0
+  %arrayidx = getelementptr inbounds [1040 x i32]* @A, i32 0, i32 %add
+  store i32 100, i32* %arrayidx, align 4
+  br label %for.inc
+
+for.inc:                                          ; preds = %for.body3
+  %inc = add nsw i32 %j.0, 1
+  br label %for.cond1
+
+for.end:                                          ; preds = %for.cond1
+  br label %for.inc4
+
+for.inc4:                                         ; preds = %for.end
+  %inc5 = add nsw i32 %i.0, 1
+  br label %for.cond
+
+for.end6:                                         ; preds = %for.cond
+  ret i32 0
+}
+
+; WITHCONST:  [[REG1:%[0-9]+]] = sext i32 %{{[0-9]+}} to i64
+; WITHCONST:  %p_mul_coeff = mul i64 16, [[REG1]]
+; WITHCONST:  %p_sum_coeff = add i64 5, %p_mul_coeff
+; WITHCONST:  [[REG2:%[0-9]+]] = sext i32 %{{[0-9]+}} to i64
+; WITHCONST:  %p_mul_coeff8 = mul i64 2, [[REG2]]
+; WITHCONST:  %p_sum_coeff9 = add i64 %p_sum_coeff, %p_mul_coeff8
+; WITHCONST:  %p_newarrayidx_ = getelementptr [1040 x i32]* @A, i64 0, i64 %p_sum_coeff9
+; WITHCONST:  store i32 100, i32* %p_newarrayidx_
+
+; WITHOUTCONST:  [[REG1:%[0-9]+]] = sext i32 %{{[0-9]+}} to i64
+; WITHOUTCONST:  %p_mul_coeff = mul i64 16, [[REG1]]
+; WITHOUTCONST:  %p_sum_coeff = add i64 0, %p_mul_coeff
+; WITHOUTCONST:  [[REG2:%[0-9]+]] = sext i32 %{{[0-9]+}} to i64
+; WITHOUTCONST:  %p_mul_coeff8 = mul i64 2, [[REG2]]
+; WITHOUTCONST:  %p_sum_coeff9 = add i64 %p_sum_coeff, %p_mul_coeff8
+; WITHOUTCONST:  %p_newarrayidx_ = getelementptr [1040 x i32]* @A, i64 0, i64 %p_sum_coeff9
+; WITHOUTCONST:  store i32 100, i32* %p_newarrayidx_

Added: polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%25for.cond---%25for.end6.jscop?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop Sat Aug  2 20:48:49 2014
@@ -0,0 +1,17 @@
+{
+   "context" : "{  :  }",
+   "name" : "for.cond => for.end6",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "write",
+               "relation" : "{ Stmt_for_body3[i0, i1] -> MemRef_A[32i0 + i1] }"
+            }
+         ],
+         "domain" : "{ Stmt_for_body3[i0, i1] : i0 >= 0 and i0 <= 31 and i1 >= 0 and i1 <= 31 }",
+         "name" : "Stmt_for_body3",
+         "schedule" : "{ Stmt_for_body3[i0, i1] -> scattering[0, i0, 0, i1, 0] }"
+      }
+   ]
+}

Added: polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop.transformed+withconst
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%25for.cond---%25for.end6.jscop.transformed%2Bwithconst?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop.transformed+withconst (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop.transformed+withconst Sat Aug  2 20:48:49 2014
@@ -0,0 +1,17 @@
+{
+   "context" : "{  :  }",
+   "name" : "for.cond => for.end6",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "write",
+               "relation" : "{ Stmt_for_body3[i0, i1] -> MemRef_A[16i0 + 2i1 + 5] }"
+            }
+         ],
+         "domain" : "{ Stmt_for_body3[i0, i1] : i0 >= 0 and i0 <= 31 and i1 >= 0 and i1 <= 31 }",
+         "name" : "Stmt_for_body3",
+         "schedule" : "{ Stmt_for_body3[i0, i1] -> scattering[0, i0, 0, i1, 0] }"
+      }
+   ]
+}

Added: polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop.transformed+withoutconst
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%25for.cond---%25for.end6.jscop.transformed%2Bwithoutconst?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop.transformed+withoutconst (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/codegen_simple_md___%for.cond---%for.end6.jscop.transformed+withoutconst Sat Aug  2 20:48:49 2014
@@ -0,0 +1,17 @@
+{
+   "context" : "{  :  }",
+   "name" : "for.cond => for.end6",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "write",
+               "relation" : "{ Stmt_for_body3[i0, i1] -> MemRef_A[16i0 + 2i1] }"
+            }
+         ],
+         "domain" : "{ Stmt_for_body3[i0, i1] : i0 >= 0 and i0 <= 31 and i1 >= 0 and i1 <= 31 }",
+         "name" : "Stmt_for_body3",
+         "schedule" : "{ Stmt_for_body3[i0, i1] -> scattering[0, i0, 0, i1, 0] }"
+      }
+   ]
+}

Added: polly/trunk/test/Isl/CodeGen/MemAccess/simple.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/simple.ll?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/simple.ll (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/simple.ll Sat Aug  2 20:48:49 2014
@@ -0,0 +1,66 @@
+;RUN: opt %loadPolly -polly-import-jscop -polly-import-jscop-dir=%S -polly-import-jscop-postfix=transformed -stats < %s 2>&1  | FileCheck %s
+; REQUIRES: asserts
+
+;int A[100];
+;int B[100];
+;
+;int simple()
+;{
+;  int i, j;
+;  for (i = 0; i < 12; i++) {
+;      A[i] = i;
+;  }
+;
+;  for (i = 0; i < 12; i++) {
+;      B[i] = i;
+;  }
+;
+;  return 0;
+;}
+;
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
+target triple = "i386-pc-linux-gnu"
+
+ at A = common global [100 x i32] zeroinitializer, align 4
+ at B = common global [100 x i32] zeroinitializer, align 4
+
+define i32 @simple() nounwind {
+entry:
+  br label %for.cond
+
+for.cond:                                         ; preds = %for.inc, %entry
+  %0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
+  %arrayidx = getelementptr [100 x i32]* @A, i32 0, i32 %0
+  %exitcond1 = icmp ne i32 %0, 12
+  br i1 %exitcond1, label %for.body, label %for.end
+
+for.body:                                         ; preds = %for.cond
+  store i32 %0, i32* %arrayidx
+  br label %for.inc
+
+for.inc:                                          ; preds = %for.body
+  %inc = add nsw i32 %0, 1
+  br label %for.cond
+
+for.end:                                          ; preds = %for.cond
+  br label %for.cond4
+
+for.cond4:                                        ; preds = %for.inc11, %for.end
+  %1 = phi i32 [ 0, %for.end ], [ %inc13, %for.inc11 ]
+  %arrayidx10 = getelementptr [100 x i32]* @B, i32 0, i32 %1
+  %exitcond = icmp ne i32 %1, 12
+  br i1 %exitcond, label %for.body7, label %for.end14
+
+for.body7:                                        ; preds = %for.cond4
+  store i32 %1, i32* %arrayidx10
+  br label %for.inc11
+
+for.inc11:                                        ; preds = %for.body7
+  %inc13 = add nsw i32 %1, 1
+  br label %for.cond4
+
+for.end14:                                        ; preds = %for.cond4
+  ret i32 0
+}
+; CHECK: 2 polly-import-jscop

Added: polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond---%for.end.jscop
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/simple___%25for.cond---%25for.end.jscop?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond---%for.end.jscop (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond---%for.end.jscop Sat Aug  2 20:48:49 2014
@@ -0,0 +1,17 @@
+{
+   "context" : "{  :  }",
+   "name" : "for.cond => for.end",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "write",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[i0] }"
+            }
+         ],
+         "domain" : "{ Stmt_for_body[i0] : i0 >= 0 and i0 <= 11 }",
+         "name" : "Stmt_for_body",
+         "schedule" : "{ Stmt_for_body[i0] -> scattering[0, i0, 0] }"
+      }
+   ]
+}

Added: polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond---%for.end.jscop.transformed
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/simple___%25for.cond---%25for.end.jscop.transformed?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond---%for.end.jscop.transformed (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond---%for.end.jscop.transformed Sat Aug  2 20:48:49 2014
@@ -0,0 +1,17 @@
+{
+   "context" : "{  :  }",
+   "name" : "for.cond => for.end",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "write",
+               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[0] }"
+            }
+         ],
+         "domain" : "{ Stmt_for_body[i0] : i0 >= 0 and i0 <= 11 }",
+         "name" : "Stmt_for_body",
+         "schedule" : "{ Stmt_for_body[i0] -> scattering[0, i0, 0] }"
+      }
+   ]
+}

Added: polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond4---%for.end14.jscop
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/simple___%25for.cond4---%25for.end14.jscop?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond4---%for.end14.jscop (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond4---%for.end14.jscop Sat Aug  2 20:48:49 2014
@@ -0,0 +1,17 @@
+{
+   "context" : "{  :  }",
+   "name" : "for.cond4 => for.end14",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "write",
+               "relation" : "{ Stmt_for_body7[i0] -> MemRef_B[i0] }"
+            }
+         ],
+         "domain" : "{ Stmt_for_body7[i0] : i0 >= 0 and i0 <= 11 }",
+         "name" : "Stmt_for_body7",
+         "schedule" : "{ Stmt_for_body7[i0] -> scattering[0, i0, 0] }"
+      }
+   ]
+}

Added: polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond4---%for.end14.jscop.transformed
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/simple___%25for.cond4---%25for.end14.jscop.transformed?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond4---%for.end14.jscop.transformed (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/simple___%for.cond4---%for.end14.jscop.transformed Sat Aug  2 20:48:49 2014
@@ -0,0 +1,17 @@
+{
+   "context" : "{  :  }",
+   "name" : "for.cond4 => for.end14",
+   "statements" : [
+      {
+         "accesses" : [
+            {
+               "kind" : "write",
+               "relation" : "{ Stmt_for_body7[i0] -> MemRef_B[0] }"
+            }
+         ],
+         "domain" : "{ Stmt_for_body7[i0] : i0 >= 0 and i0 <= 11 }",
+         "name" : "Stmt_for_body7",
+         "schedule" : "{ Stmt_for_body7[i0] -> scattering[0, i0, 0] }"
+      }
+   ]
+}

Added: polly/trunk/test/Isl/CodeGen/MemAccess/simple_analyze.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/Isl/CodeGen/MemAccess/simple_analyze.ll?rev=214657&view=auto
==============================================================================
--- polly/trunk/test/Isl/CodeGen/MemAccess/simple_analyze.ll (added)
+++ polly/trunk/test/Isl/CodeGen/MemAccess/simple_analyze.ll Sat Aug  2 20:48:49 2014
@@ -0,0 +1,47 @@
+;RUN: opt %loadPolly -polly-import-jscop -analyze -polly-import-jscop-dir=%S -polly-import-jscop-postfix=transformed < %s | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
+target triple = "i386-pc-linux-gnu"
+
+ at A = common global [100 x i32] zeroinitializer, align 4
+ at B = common global [100 x i32] zeroinitializer, align 4
+
+define i32 @simple() nounwind {
+entry:
+  br label %for.cond
+
+for.cond:                                         ; preds = %for.inc, %entry
+  %0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
+  %arrayidx = getelementptr [100 x i32]* @A, i32 0, i32 %0
+  %exitcond1 = icmp ne i32 %0, 12
+  br i1 %exitcond1, label %for.body, label %for.end
+
+for.body:                                         ; preds = %for.cond
+  store i32 %0, i32* %arrayidx
+  br label %for.inc
+
+for.inc:                                          ; preds = %for.body
+  %inc = add nsw i32 %0, 1
+  br label %for.cond
+
+for.end:                                          ; preds = %for.cond
+  br label %for.cond4
+
+for.cond4:                                        ; preds = %for.inc11, %for.end
+  %1 = phi i32 [ 0, %for.end ], [ %inc13, %for.inc11 ]
+  %arrayidx10 = getelementptr [100 x i32]* @B, i32 0, i32 %1
+  %exitcond = icmp ne i32 %1, 12
+  br i1 %exitcond, label %for.body7, label %for.end14
+
+for.body7:                                        ; preds = %for.cond4
+  store i32 %1, i32* %arrayidx10
+  br label %for.inc11
+
+for.inc11:                                        ; preds = %for.body7
+  %inc13 = add nsw i32 %1, 1
+  br label %for.cond4
+
+for.end14:                                        ; preds = %for.cond4
+  ret i32 0
+}
+; CHECK: New access function '{ Stmt_for_body7[i0] -> MemRef_B[0] }'detected in JSCOP file
+; CHECK: New access function '{ Stmt_for_body[i0] -> MemRef_A[0] }'detected in JSCOP file





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