[PATCH] R600/SI: Add exec_lo and exec_hi subregisters.
Matt Arsenault
Matthew.Arsenault at amd.com
Fri Aug 1 17:24:40 PDT 2014
Also be sure to include all of these subregisters in SReg_32.
This fixes inferring SGPR instead of SReg when finding a
super register class.
http://reviews.llvm.org/D4760
Files:
lib/Target/R600/SIRegisterInfo.td
Index: lib/Target/R600/SIRegisterInfo.td
===================================================================
--- lib/Target/R600/SIRegisterInfo.td
+++ lib/Target/R600/SIRegisterInfo.td
@@ -27,7 +27,15 @@
let HWEncoding = 106;
}
-def EXEC : SIReg<"EXEC", 126>;
+def EXEC_LO : SIReg<"EXEC", 126>;
+def EXEC_HI : SIReg<"EXEC", 127>;
+
+def EXEC : RegisterWithSubRegs<"EXEC", [EXEC_LO, EXEC_HI]> {
+ let Namespace = "AMDGPU";
+ let SubRegIndices = [sub0, sub1];
+ let HWEncoding = 126;
+}
+
def SCC : SIReg<"SCC", 253>;
def M0 : SIReg <"M0", 124>;
@@ -159,7 +167,7 @@
// Register class for all scalar registers (SGPRs + Special Registers)
def SReg_32 : RegisterClass<"AMDGPU", [f32, i32], 32,
- (add SGPR_32, M0Reg, VCC_LO)
+ (add SGPR_32, M0Reg, VCC_LO, VCC_HI, EXEC_LO, EXEC_HI)
>;
def SGPR_64 : RegisterClass<"AMDGPU", [v2i32, i64], 64, (add SGPR_64Regs)>;
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