[llvm] r214469 - [PowerPC] Recognize consecutive memory accesses from intrinsics

[Hal Finkel]

----- Original Message -----
> From: "Matt Arsenault" <Matthew.Arsenault at amd.com>
> To: "Hal Finkel" <hfinkel at anl.gov>, llvm-commits at cs.uiuc.edu
> Sent: Thursday, July 31, 2014 8:23:00 PM
> Subject: Re: [llvm] r214469 - [PowerPC] Recognize consecutive memory accesses from intrinsics
> 
> On 07/31/2014 06:02 PM, Hal Finkel wrote:
> > +// Like SelectionDAG::isConsecutiveLoad, but also works for
> > stores, and does
> > +// not enforce equality of the chain operands.
> > +static bool isConsecutiveLS(SDNode *N, LSBaseSDNode *Base,
> What's the reasoning for isConsecutiveLoad enforcing chain equality?

I believe because it is used in a more-general context. The version in the PPC backend is only called from a function that is doing a limited search up and down the chain, and so does not need to compare chain operands to ensure safely. I'll need to double-check, it has been a while since I originally wrote that comment.

> Could we move this variant to SelectionDAG?

With proper refactoring, yes. We'd need some kind of callback to recognize target intrinsics.

 -Hal

> 

-- 
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory