[llvm] r214388 - [FastISel][AArch64] Add sqrt intrinsic support.

[Juergen Ributzka]

Author: ributzka
Date: Thu Jul 31 01:25:33 2014
New Revision: 214388

URL: http://llvm.org/viewvc/llvm-project?rev=214388&view=rev
Log:
[FastISel][AArch64] Add sqrt intrinsic support.

Fixes <rdar://problem/17867067>.

Added:
    llvm/trunk/test/CodeGen/AArch64/fast-isel-sqrt.ll
Modified:
    llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp?rev=214388&r1=214387&r2=214388&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp Thu Jul 31 01:25:33 2014
@@ -1708,6 +1708,25 @@ bool AArch64FastISel::FastLowerIntrinsic
         .addImm(1);
     return true;
   }
+  case Intrinsic::sqrt: {
+    Type *RetTy = II->getCalledFunction()->getReturnType();
+
+    MVT VT;
+    if (!isTypeLegal(RetTy, VT))
+      return false;
+
+    unsigned Op0Reg = getRegForValue(II->getOperand(0));
+    if (!Op0Reg)
+      return false;
+    bool Op0IsKill = hasTrivialKill(II->getOperand(0));
+
+    unsigned ResultReg = FastEmit_r(VT, VT, ISD::FSQRT, Op0Reg, Op0IsKill);
+    if (!ResultReg)
+      return false;
+
+    UpdateValueMap(II, ResultReg);
+    return true;
+  }
   case Intrinsic::sadd_with_overflow:
   case Intrinsic::uadd_with_overflow:
   case Intrinsic::ssub_with_overflow:

Added: llvm/trunk/test/CodeGen/AArch64/fast-isel-sqrt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fast-isel-sqrt.ll?rev=214388&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/fast-isel-sqrt.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/fast-isel-sqrt.ll Thu Jul 31 01:25:33 2014
@@ -0,0 +1,20 @@
+; RUN: llc -mtriple=arm64-apple-darwin                             < %s | FileCheck %s
+; RUN: llc -mtriple=arm64-apple-darwin -fast-isel -fast-isel-abort < %s | FileCheck %s
+
+define float @test_sqrt_f32(float %a) {
+; CHECK-LABEL: test_sqrt_f32
+; CHECK:       fsqrt s0, s0
+  %res = call float @llvm.sqrt.f32(float %a)
+  ret float %res
+}
+declare float @llvm.sqrt.f32(float) nounwind readnone
+
+define double @test_sqrt_f64(double %a) {
+; CHECK-LABEL: test_sqrt_f64
+; CHECK:       fsqrt d0, d0
+  %res = call double @llvm.sqrt.f64(double %a)
+  ret double %res
+}
+declare double @llvm.sqrt.f64(double) nounwind readnone
+
+