[PATCH] Retain alignment requirements for load->selects modified by DAGCombine

[Hal Finkel]

----- Original Message -----
> From: "Owen Anderson" <resistor at mac.com>
> To: "Louis Gerbarg" <lgg at apple.com>
> Cc: llvm-commits at cs.uiuc.edu
> Sent: Wednesday, July 30, 2014 12:58:10 PM
> Subject: Re: [PATCH] Retain alignment requirements for load->selects modified	by DAGCombine
> 
> Perhaps this optimization should be disabled if it would reduce
> alignment and the target does not support unaligned accesses?  See
> TargetLoweringBase::allowsMisalignedMemoryAccesses() for a way to
> determine this.

But what does that buy you? You still otherwise have an unaligned load, so the question is, "is one unaligned + one aligned load better than just one unaligned load?"

 -Hal

> 
> —Owen
> 
> On Jul 30, 2014, at 10:40 AM, Louis Gerbarg <lgg at apple.com> wrote:
> 
> > This patch fixes an issue where we can generate aligned loads for
> > unaligned data. It is a latent bug that has been around for years,
> > but we have started tripping it recently with the introduction of
> > more aggressive vectorization, etc. On x86 this manifests as
> > generating a movapd when we should have used a movupd, which then
> > results in a segfault if the data does not happened to be aligned.
> > The problem is in platform independent codegen, so this may
> > manifest on other architectures as well. I suspect on PPC this may
> > result in some subtle data corruption bugs since altivec loads
> > will take an unaligned address without faulting and just ignore
> > the low bits.
> > 
> > Tests included.
> > 
> > Louis
> > 
> > <0001-Retain-alignment-requirements-for-load-selects-modif.patch>_______________________________________________
> > llvm-commits mailing list
> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 
> 
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-- 
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory