[llvm] r214266 - Add support for scalarizing ctlz_zero_undef

[Petar Jovanovic]

Author: petarj
Date: Tue Jul 29 19:44:03 2014
New Revision: 214266

URL: http://llvm.org/viewvc/llvm-project?rev=214266&view=rev
Log:
Add support for scalarizing ctlz_zero_undef

Fix the missing case in ScalarizeVectorResult() that was exposed with
libclcore.bc in Android.

Differential Revision: http://reviews.llvm.org/D4645

Added:
    llvm/trunk/test/CodeGen/Mips/ctlz-v.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=214266&r1=214265&r2=214266&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Tue Jul 29 19:44:03 2014
@@ -69,6 +69,7 @@ void DAGTypeLegalizer::ScalarizeVectorRe
   case ISD::ANY_EXTEND:
   case ISD::BSWAP:
   case ISD::CTLZ:
+  case ISD::CTLZ_ZERO_UNDEF:
   case ISD::CTPOP:
   case ISD::CTTZ:
   case ISD::FABS:

Added: llvm/trunk/test/CodeGen/Mips/ctlz-v.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/ctlz-v.ll?rev=214266&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/ctlz-v.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/ctlz-v.ll Tue Jul 29 19:44:03 2014
@@ -0,0 +1,19 @@
+; RUN: llc  < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=MIPS32
+; RUN: llc  < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64
+
+declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1)
+
+define <2 x i32> @ctlzv2i32(<2 x i32> %x) {
+entry:
+; MIPS32: clz     $2, $4
+; MIPS32: jr      $ra
+; MIPS32: clz     $3, $5
+
+; MIPS64: clz     $2, $4
+; MIPS64: jr      $ra
+; MIPS64: clz     $3, $5
+
+  %ret = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %x, i1 true)
+  ret <2 x i32> %ret
+}
+