[PATCH] R600/SI: Implement areLoadsFromSameBasePtr

Matt Arsenault Matthew.Arsenault at amd.com
Tue Jul 29 17:18:58 PDT 2014


On 07/29/2014 05:12 PM, Tom Stellard wrote:
> I think this should be getNumOperandsNoGlue(Load0), but will two loads
> always have the same number of operands? Won't this fail if we
> have a program with DS_READ_B32 and DS_READ2_B32?
Yes it would fail. That's sort of what I was trying to catch. I didn't 
want to put too much effort into handling theoretical read2 nodes, since 
I'm not 100% sure there will ever be a read2 node for the DAG scheduler 
to see. If I can get the scheduler to do the right thing with constant 
offset LDS loads, something like the misaligned 8-byte load that might 
be selected to read2 should be caught by the code necessary anyway to 
form read2s from unrelated loads on MachineInstrs





More information about the llvm-commits mailing list