[PATCH] [AArch64] Generate tbz/tbnz when comparing against zero.

[Chad Rosier]

Jiangning,
I've updated the patch according to your feedback.  Rather than enable the combine for just ADD/SUB it is now enabled in all cases except when the LHS operand is an AND.  The emitComparison converts the AND to an ANDS and the test bit and branch instruction becomes redundant.  It also increases register pressure because the ANDS instruction must write to a register (rather than WZR/XZR), which is consumed by the test bit and branch instruction.  test8 provides examples of why we don't want to combine ANDs.

The performance numbers are slightly better, but still less than noise.  All, please take a look.

 Chad

http://reviews.llvm.org/D4440

Files:
  lib/Target/AArch64/AArch64ISelLowering.cpp
  test/CodeGen/AArch64/tbz-tbnz.ll
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