[Polly] Generating code for changed memory accesses

Tobias Grosser tobias at grosser.es
Mon Jul 28 23:15:49 PDT 2014


On 29/07/2014 04:07, 'Johannes Doerfert' wrote:
>> There is a difference between scattering and domain. Only the scattering is
>> changed, the dimensionality of the domain is _never_ changed and
>> consequently the memory access does not need to be updated.
> Then I just have an implementation problem I guess...
>
>>> Now we can either apply the scattering to the access relation when we generate code or not.
>>
>> What you want to do is the following:
>>
>> 1) Get the schedule map from the isl_ast_build
>>
>> 2) Translate it to an isl_pw_multi_aff
>>
>> 3) Translate the access function to an isl_pw_multi_aff
>>
>> 4) Express the access function in terms of new loop iterators
>>
>> To do this you use isl_multi_pw_aff_pullback_pw_multi_aff() to
>> apply the schedule pma to the your access function
>>
>> 5) Build the ast expression
> I tried this and I run into the same problems as before (test case:
> test/Isl/CodeGen/20120403-RHS-type-mismatch.ll, the new getNewAccessOperand
> function is appended to this mail).
>
> I show you the results of the steps above. Note, that in my implementation I
> remove the Stmt_for_body7 tuple name to make it work in general,

I don't see why removing the tuple name should be needed. The tuple 
names should match. If they don't either I misunderstood something or 
you use them in the wrong way.

 > only these
> corner cases are not yet handled.
>
> 1)
>    { Stmt_for_body7[0] -> [] }
> 2)
>    { Stmt_for_body7[i0] -> [] : i0 = 0 }
> 3) a) The access relation (isl_map)
>    { Stmt_for_body7[i0] -> MemRef_hi_129_reg2mem[0] }
> 3) b) The access relation (pw_multi_aff)
>    { Stmt_for_body7[i0] -> MemRef_hi_129_reg2mem[(0)] }
> 4)
>    Crash (in isl_space_tuple_match).
> 5) This part is fine again.
>
>
> Can you tell me what I'm doing wrong?

Sorry, I forgot to reverse the schedule map: Here the full flow for your 
example:

In [23]: schedule_map = islpy.Map("{ Stmt_for_body7[i0] -> [] : i0 = 0 }")

In [24]: schedule_map
Out[24]: Map("{ Stmt_for_body7[0] -> [] }")

In [25]: access_map = islpy.Map("{ Stmt_for_body7[i0] -> 
MemRef_hi_129_reg2mem[0] }")

In [26]: access_map
Out[26]: Map("{ Stmt_for_body7[i0] -> MemRef_hi_129_reg2mem[0] }")

In [27]: schedule = islpy.PwMultiAff.from_map(schedule_map.reverse())

In [28]: schedule
Out[28]: PwMultiAff("{ [] -> Stmt_for_body7[(0)] }")

In [29]: access = islpy.PwMultiAff.from_map(access_map)

In [30]: access
Out[30]: PwMultiAff("{ Stmt_for_body7[i0] -> MemRef_hi_129_reg2mem[(0)] }")

In [31]: access.pullback_pw_multi_aff(schedule)
Out[31]: PwMultiAff("{ [] -> MemRef_hi_129_reg2mem[(0)] }")

Cheers,
Tobias




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