[PATCH] Emit ABI_PCS_R9_use build attribute.
Benjamin Foster
benjamin.foster at arm.com
Fri Jul 25 01:44:57 PDT 2014
The comments are now aligned.
http://reviews.llvm.org/D4657
Files:
include/llvm/Support/ARMBuildAttributes.h
lib/Target/ARM/ARMAsmPrinter.cpp
test/CodeGen/ARM/build-attributes.ll
Index: include/llvm/Support/ARMBuildAttributes.h
===================================================================
--- include/llvm/Support/ARMBuildAttributes.h
+++ include/llvm/Support/ARMBuildAttributes.h
@@ -146,6 +146,12 @@
AllowNeon2 = 2, // SIMDv2 was permitted (Half-precision FP, MAC operations)
AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted
+ // Tag_ABI_PCS_R9_use, (=14), uleb128
+ R9IsGPR = 0, // R9 used as v6 (just another callee-saved register)
+ R9IsSB = 1, // R9 used as a global static base rgister
+ R9IsTLSPointer = 2, // R9 used as a thread local storage pointer
+ R9Reserved = 3, // R9 not used by code associated with attributed entity
+
// Tag_ABI_PCS_RW_data, (=15), uleb128
AddressRWPCRel = 1, // Address RW static data PC-relative
AddressRWSBRel = 2, // Address RW static data SB-relative
Index: lib/Target/ARM/ARMAsmPrinter.cpp
===================================================================
--- lib/Target/ARM/ARMAsmPrinter.cpp
+++ lib/Target/ARM/ARMAsmPrinter.cpp
@@ -760,6 +760,17 @@
}
}
+ // TODO: We currently only support either reserving the register, or treating
+ // it as another callee-saved register, but not as SB or a TLS pointer; It
+ // would instead be nicer to push this from the frontend as metadata, as we do
+ // for the wchar and enum size tags
+ if (Subtarget->isR9Reserved())
+ ATS.emitAttribute(ARMBuildAttrs::ABI_PCS_R9_use,
+ ARMBuildAttrs::R9Reserved);
+ else
+ ATS.emitAttribute(ARMBuildAttrs::ABI_PCS_R9_use,
+ ARMBuildAttrs::R9IsGPR);
+
if (Subtarget->hasTrustZone() && Subtarget->hasVirtualization())
ATS.emitAttribute(ARMBuildAttrs::Virtualization_use,
ARMBuildAttrs::AllowTZVirtualization);
Index: test/CodeGen/ARM/build-attributes.ll
===================================================================
--- test/CodeGen/ARM/build-attributes.ll
+++ test/CodeGen/ARM/build-attributes.ll
@@ -38,6 +38,8 @@
; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=default | FileCheck %s --check-prefix=RELOC-OTHER
; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
; RUN: llc < %s -mtriple=arm-none-linux-gnueabi | FileCheck %s --check-prefix=RELOC-OTHER
+; RUN: llc < %s -mtriple=arm-none-linux-gnueabi | FileCheck %s --check-prefix=PCS-R9-USE
+; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -arm-reserve-r9 | FileCheck %s --check-prefix=PCS-R9-RESERVE
; XSCALE: .eabi_attribute 6, 5
; XSCALE: .eabi_attribute 8, 1
@@ -463,6 +465,9 @@
; RELOC-PIC: .eabi_attribute 17, 2
; RELOC-OTHER: .eabi_attribute 17, 1
+; PCS-R9-USE: .eabi_attribute 14, 0
+; PCS-R9-RESERVE: .eabi_attribute 14, 3
+
define i32 @f(i64 %z) {
ret i32 0
}
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