[llvm] r213784 - [NVPTX] mul.wide generation works for any smaller integer source types, not just the next smaller power of two
Justin Holewinski
jholewinski at nvidia.com
Wed Jul 23 11:46:04 PDT 2014
Author: jholewinski
Date: Wed Jul 23 13:46:03 2014
New Revision: 213784
URL: http://llvm.org/viewvc/llvm-project?rev=213784&view=rev
Log:
[NVPTX] mul.wide generation works for any smaller integer source types, not just the next smaller power of two
Modified:
llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp
llvm/trunk/test/CodeGen/NVPTX/mulwide.ll
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp?rev=213784&r1=213783&r2=213784&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp Wed Jul 23 13:46:03 2014
@@ -4053,13 +4053,13 @@ static bool IsMulWideOperandDemotable(SD
if (Op.getOpcode() == ISD::SIGN_EXTEND ||
Op.getOpcode() == ISD::SIGN_EXTEND_INREG) {
EVT OrigVT = Op.getOperand(0).getValueType();
- if (OrigVT.getSizeInBits() == OptSize) {
+ if (OrigVT.getSizeInBits() <= OptSize) {
S = Signed;
return true;
}
} else if (Op.getOpcode() == ISD::ZERO_EXTEND) {
EVT OrigVT = Op.getOperand(0).getValueType();
- if (OrigVT.getSizeInBits() == OptSize) {
+ if (OrigVT.getSizeInBits() <= OptSize) {
S = Unsigned;
return true;
}
Modified: llvm/trunk/test/CodeGen/NVPTX/mulwide.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/NVPTX/mulwide.ll?rev=213784&r1=213783&r2=213784&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/NVPTX/mulwide.ll (original)
+++ llvm/trunk/test/CodeGen/NVPTX/mulwide.ll Wed Jul 23 13:46:03 2014
@@ -23,6 +23,28 @@ define i32 @mulwideu16(i16 %a, i16 %b) {
ret i32 %val2
}
+; OPT-LABEL: @mulwide8
+; NOOPT-LABEL: @mulwide8
+define i32 @mulwide8(i8 %a, i8 %b) {
+; OPT: mul.wide.s16
+; NOOPT: mul.lo.s32
+ %val0 = sext i8 %a to i32
+ %val1 = sext i8 %b to i32
+ %val2 = mul i32 %val0, %val1
+ ret i32 %val2
+}
+
+; OPT-LABEL: @mulwideu8
+; NOOPT-LABEL: @mulwideu8
+define i32 @mulwideu8(i8 %a, i8 %b) {
+; OPT: mul.wide.u16
+; NOOPT: mul.lo.s32
+ %val0 = zext i8 %a to i32
+ %val1 = zext i8 %b to i32
+ %val2 = mul i32 %val0, %val1
+ ret i32 %val2
+}
+
; OPT-LABEL: @mulwide32
; NOOPT-LABEL: @mulwide32
define i64 @mulwide32(i32 %a, i32 %b) {
More information about the llvm-commits
mailing list