[PATCH] [AArch64] Generate tbz/tbnz when comparing against zero.

[Chad Rosier]

Hi Jiangning,
AFAICT, emitComparison only generates ADDS, SUBS, and ANDS.  I didn't handle the ANDS case because I didn't want to break test8 (extracted from logical_shifted_reg.ll) and it wasn't applicable to the code I was trying to target.  I'll need to investigate this case further before I enable the combine for ANDS.

According to the documentation I have, the only other scalar operations that set the condition flags are ADCS, BICS, NEGS, NGCS, and SCBS.  I'll look into adding these operations as well, but I'm not sure we'll hit these case very often, if at all.

I'll investigate adding an implementation in InstCombine.  Thanks for the suggestion!

 Chad

http://reviews.llvm.org/D4440