[llvm] r213376 - R600: support fpext/fptrunc operations to and from f16.

[Tim Northover]

Author: tnorthover
Date: Fri Jul 18 08:01:37 2014
New Revision: 213376

URL: http://llvm.org/viewvc/llvm-project?rev=213376&view=rev
Log:
R600: support fpext/fptrunc operations to and from f16.

Modified:
    llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp
    llvm/trunk/test/CodeGen/R600/half.ll

Modified: llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp?rev=213376&r1=213375&r2=213376&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp Fri Jul 18 08:01:37 2014
@@ -244,6 +244,10 @@ AMDGPUTargetLowering::AMDGPUTargetLoweri
 
   setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand);
 
+  setLoadExtAction(ISD::EXTLOAD, MVT::f16, Expand);
+  setTruncStoreAction(MVT::f32, MVT::f16, Expand);
+  setTruncStoreAction(MVT::f64, MVT::f16, Expand);
+
   const MVT ScalarIntVTs[] = { MVT::i32, MVT::i64 };
   for (MVT VT : ScalarIntVTs) {
     setOperationAction(ISD::SREM, VT, Expand);

Modified: llvm/trunk/test/CodeGen/R600/half.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/half.ll?rev=213376&r1=213375&r2=213376&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/half.ll (original)
+++ llvm/trunk/test/CodeGen/R600/half.ll Fri Jul 18 08:01:37 2014
@@ -28,3 +28,34 @@ define void @test_bitcast_to_half(half a
   store half %val_fp, half addrspace(1)* %out
   ret void
 }
+
+define void @test_extend32(half addrspace(1)* %in, float addrspace(1)* %out) {
+; CHECK-LABEL: @test_extend32
+; CHECK: V_CVT_F32_F16_e32
+
+  %val16 = load half addrspace(1)* %in
+  %val32 = fpext half %val16 to float
+  store float %val32, float addrspace(1)* %out
+  ret void
+}
+
+define void @test_extend64(half addrspace(1)* %in, double addrspace(1)* %out) {
+; CHECK-LABEL: @test_extend64
+; CHECK: V_CVT_F32_F16_e32
+; CHECK: V_CVT_F64_F32_e32
+
+  %val16 = load half addrspace(1)* %in
+  %val64 = fpext half %val16 to double
+  store double %val64, double addrspace(1)* %out
+  ret void
+}
+
+define void @test_trunc32(float addrspace(1)* %in, half addrspace(1)* %out) {
+; CHECK-LABEL: @test_trunc32
+; CHECK: V_CVT_F16_F32_e32
+
+  %val32 = load float addrspace(1)* %in
+  %val16 = fptrunc float %val32 to half
+  store half %val16, half addrspace(1)* %out
+  ret void
+}