[llvm] r213011 - [X86] Specify all TSFlags bit-offsets symbolically

[Craig Topper]

They're relative to VEXShift to keep the values fitting in an unsigned so
it can be an enum. Perhaps with strongly typed enums in c++11 that can be
fixed now.


On Mon, Jul 14, 2014 at 4:18 PM, Adam Nemet <anemet at apple.com> wrote:

> Author: anemet
> Date: Mon Jul 14 18:18:39 2014
> New Revision: 213011
>
> URL: http://llvm.org/viewvc/llvm-project?rev=213011&view=rev
> Log:
> [X86] Specify all TSFlags bit-offsets symbolically
>
> No functional change.
>
> The offsets for the other bitfields are specified symbolically.  I need to
> increase the size for one of the earlier fields which is easier after this
> cleanup.
>
> Why these bits are relative to VEXShift is a bit strange but that is for
> another cleanup.
>
> I made sure that the values for the enums are unchanged after this change.
>
> Modified:
>     llvm/trunk/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
>
> Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86BaseInfo.h?rev=213011&r1=213010&r2=213011&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86BaseInfo.h (original)
> +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86BaseInfo.h Mon Jul 14
> 18:18:39 2014
> @@ -534,14 +534,17 @@ namespace X86II {
>      /// storing a classifier in the imm8 field.  To simplify our
> implementation,
>      /// we handle this by storeing the classifier in the opcode field and
> using
>      /// this flag to indicate that the encoder should do the wacky 3DNow!
> thing.
> -    Has3DNow0F0FOpcode = 1U << 15,
> +    Has3DNow0F0FOpcodeShift = EVEX_CD8VShift + 3,
> +    Has3DNow0F0FOpcode = 1U << (Has3DNow0F0FOpcodeShift - VEXShift),
>
>      /// MemOp4 - Used to indicate swapping of operand 3 and 4 to be
> encoded in
>      /// ModRM or I8IMM. This is used for FMA4 and XOP instructions.
> -    MemOp4 = 1U << 16,
> +    MemOp4Shift = Has3DNow0F0FOpcodeShift + 1,
> +    MemOp4 = 1U << (MemOp4Shift - VEXShift),
>
>      /// Explicitly specified rounding control
> -    EVEX_RC = 1U << 17
> +    EVEX_RCShift = MemOp4Shift + 1,
> +    EVEX_RC = 1U << (EVEX_RCShift - VEXShift)
>    };
>
>    // getBaseOpcodeFor - This function returns the "base" X86 opcode for
> the
>
>
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-- 
~Craig
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