[llvm] r212948 - X86: remove temporary atomicrmw used during lowering.

Tim Northover tnorthover at apple.com
Mon Jul 14 08:31:14 PDT 2014


Author: tnorthover
Date: Mon Jul 14 10:31:13 2014
New Revision: 212948

URL: http://llvm.org/viewvc/llvm-project?rev=212948&view=rev
Log:
X86: remove temporary atomicrmw used during lowering.

We construct a temporary "atomicrmw xchg" instruction when lowering atomic
stores for widths that aren't supported natively. This isn't on the top-level
worklist though, so it won't be removed automatically and we have to do it
ourselves once that itself has been lowered.

Thanks Saleem for pointing this out!

Modified:
    llvm/trunk/lib/Target/X86/X86AtomicExpandPass.cpp
    llvm/trunk/test/CodeGen/X86/atomic128.ll

Modified: llvm/trunk/lib/Target/X86/X86AtomicExpandPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AtomicExpandPass.cpp?rev=212948&r1=212947&r2=212948&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86AtomicExpandPass.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86AtomicExpandPass.cpp Mon Jul 14 10:31:13 2014
@@ -277,8 +277,11 @@ bool X86AtomicExpandPass::expandAtomicSt
                               SI->getValueOperand(), Order);
 
   // Now we have an appropriate swap instruction, lower it as usual.
-  if (shouldExpandAtomicRMW(AI))
-    return expandAtomicRMW(AI);
+  if (shouldExpandAtomicRMW(AI)) {
+    expandAtomicRMW(AI);
+    AI->eraseFromParent();
+    return true;
+  }
 
   return AI;
 }

Modified: llvm/trunk/test/CodeGen/X86/atomic128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic128.ll?rev=212948&r1=212947&r2=212948&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic128.ll Mon Jul 14 10:31:13 2014
@@ -277,6 +277,7 @@ define void @atomic_store_seq_cst(i128*
 ; CHECK:         lock
 ; CHECK:         cmpxchg16b (%rdi)
 ; CHECK:         jne [[LOOP]]
+; CHECK-NOT:     callq ___sync_lock_test_and_set_16
 
    store atomic i128 %in, i128* %p seq_cst, align 16
    ret void





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