[llvm] r212893 - R600: Add option to disable promote alloca

[Matt Arsenault]

Author: arsenm
Date: Sat Jul 12 21:08:26 2014
New Revision: 212893

URL: http://llvm.org/viewvc/llvm-project?rev=212893&view=rev
Log:
R600: Add option to disable promote alloca

This can make writing some tests harder, so add a flag
to disable it.

Modified:
    llvm/trunk/lib/Target/R600/AMDGPU.td
    llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp
    llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h
    llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp

Modified: llvm/trunk/lib/Target/R600/AMDGPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPU.td?rev=212893&r1=212892&r2=212893&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPU.td (original)
+++ llvm/trunk/lib/Target/R600/AMDGPU.td Sat Jul 12 21:08:26 2014
@@ -25,6 +25,11 @@ def FeatureIRStructurizer : SubtargetFea
         "false",
         "Disable IR Structurizer">;
 
+def FeaturePromoteAlloca : SubtargetFeature <"promote-alloca",
+        "EnablePromoteAlloca",
+        "true",
+        "Enable promote alloca pass">;
+
 // Target features
 
 def FeatureIfCvt : SubtargetFeature <"disable-ifcvt",

Modified: llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp?rev=212893&r1=212892&r2=212893&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp Sat Jul 12 21:08:26 2014
@@ -16,6 +16,8 @@
 #include "R600InstrInfo.h"
 #include "SIInstrInfo.h"
 
+#include "llvm/ADT/SmallString.h"
+
 using namespace llvm;
 
 #define DEBUG_TYPE "amdgpu-subtarget"
@@ -37,12 +39,17 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringR
   FP64(false),
   CaymanISA(false),
   EnableIRStructurizer(true),
+  EnablePromoteAlloca(false),
   EnableIfCvt(true),
   WavefrontSize(0),
   CFALUBug(false),
   LocalMemorySize(0),
   InstrItins(getInstrItineraryForCPU(GPU)) {
-  ParseSubtargetFeatures(GPU, FS);
+
+  SmallString<256> FullFS("+promote-alloca,");
+  FullFS += FS;
+
+  ParseSubtargetFeatures(GPU, FullFS);
 
   if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) {
     InstrInfo.reset(new R600InstrInfo(*this));

Modified: llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h?rev=212893&r1=212892&r2=212893&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h Sat Jul 12 21:08:26 2014
@@ -52,6 +52,7 @@ private:
   bool FP64;
   bool CaymanISA;
   bool EnableIRStructurizer;
+  bool EnablePromoteAlloca;
   bool EnableIfCvt;
   unsigned WavefrontSize;
   bool CFALUBug;
@@ -81,7 +82,7 @@ public:
   }
 
   short getTexVTXClauseSize() const {
-      return TexVTXClauseSize;
+    return TexVTXClauseSize;
   }
 
   Generation getGeneration() const {
@@ -129,6 +130,10 @@ public:
     return EnableIRStructurizer;
   }
 
+  bool isPromoteAllocaEnabled() const {
+    return EnablePromoteAlloca;
+  }
+
   bool isIfCvtEnabled() const {
     return EnableIfCvt;
   }

Modified: llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp?rev=212893&r1=212892&r2=212893&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp Sat Jul 12 21:08:26 2014
@@ -33,7 +33,6 @@
 #include "llvm/Transforms/Scalar.h"
 #include <llvm/CodeGen/Passes.h>
 
-
 using namespace llvm;
 
 extern "C" void LLVMInitializeR600Target() {
@@ -137,8 +136,11 @@ void AMDGPUTargetMachine::addAnalysisPas
 
 void AMDGPUPassConfig::addCodeGenPrepare() {
   const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
-  addPass(createAMDGPUPromoteAlloca(ST));
-  addPass(createSROAPass());
+  if (ST.isPromoteAllocaEnabled()) {
+    addPass(createAMDGPUPromoteAlloca(ST));
+    addPass(createSROAPass());
+  }
+
   TargetPassConfig::addCodeGenPrepare();
 }