[PATCH] [x86] Add a ZERO_EXTEND_VECTOR_INREG DAG node and use it when widening vector types to be legal and a ZERO_EXTEND node is encountered.

[Chandler Carruth]

Closed by commit rL212610 (authored by @chandlerc).

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D4405

Files:
  llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
  llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
  llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/test/CodeGen/X86/widen_conversions.ll
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