[llvm] r212443 - CodeGen: it turns out that NAND is not the same thing as BIC. At all.

[Hal Finkel]

----- Original Message -----
> From: "Tim Northover" <tnorthover at apple.com>
> To: llvm-commits at cs.uiuc.edu
> Sent: Monday, July 7, 2014 4:06:35 AM
> Subject: [llvm] r212443 - CodeGen: it turns out that NAND is not the same	thing as BIC. At all.
> 
> Author: tnorthover
> Date: Mon Jul  7 04:06:35 2014
> New Revision: 212443
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=212443&view=rev
> Log:
> CodeGen: it turns out that NAND is not the same thing as BIC. At all.
> 
> We've been performing the wrong operation on ARM for "atomicrmw nand"
> for
> years, since "a NAND b" is "~(a & b)" rather than ARM's very tempting
> "a & ~b".
> This bled over into the generic expansion pass.
> 
> So I assume no-one has ever actually tried to do an atomic nand in
> the real
> world. Oh well.
> 
> Modified:
>     llvm/trunk/lib/CodeGen/AtomicExpandLoadLinkedPass.cpp
>     llvm/trunk/lib/Target/X86/X86FastISel.cpp
>     llvm/trunk/test/CodeGen/AArch64/arm64-atomic-128.ll
>     llvm/trunk/test/CodeGen/AArch64/arm64-atomic.ll
>     llvm/trunk/test/Transforms/AtomicExpandLoadLinked/ARM/atomic-expansion-v7.ll
> 
> Modified: llvm/trunk/lib/CodeGen/AtomicExpandLoadLinkedPass.cpp
...
> 
> Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=212443&r1=212442&r2=212443&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Mon Jul  7 04:06:35
> 2014
> @@ -2402,7 +2402,7 @@ bool X86FastISel::X86VisitIntrinsicCall(
>      case Intrinsic::usub_with_overflow:
>        BaseOpc = ISD::SUB; CondOpc = X86::SETBr; break;
>      case Intrinsic::smul_with_overflow:
> -      BaseOpc = ISD::MUL; CondOpc = X86::SETOr; break;
> +      BaseOpc = X86ISD::SMUL; CondOpc = X86::SETOr; break;
>      case Intrinsic::umul_with_overflow:
>        BaseOpc = X86ISD::UMUL; CondOpc = X86::SETOr; break;
>      }

This looks like an unrelated change?

 -Hal

...

> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 

-- 
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory