[PATCH] Implement ISB memory barrier intrinsic for AArch32

[Tim Northover]

Hi Yi,

On 3 July 2014 15:33, Yi Kong <kongy.dev at gmail.com> wrote:
> Thanks for reviewing! Patch updated.

Thanks for updating the patch; just one tiny nit (feel free to commit
after fixing):

+; RUN: llc < %s -mtriple=thumbv2 -mattr=+db | FileCheck %s

This (i.e. "thumbv2") probably doesn't do what you intend. It doesn't
have anything to do with Thumb2, and would be interpreted as some kind
of ARMv2 CPU in thumb mode. I'd suggest thumbv7 (and you can skip the
"-mattr=db" too, I think).

Cheers.

Tim.