[llvm] r212158 - [cleanup] Hoist the promotion dispatch logic into the promote function
Craig Topper
craig.topper at gmail.com
Tue Jul 1 20:22:12 PDT 2014
On Tue, Jul 1, 2014 at 8:07 PM, Chandler Carruth <chandlerc at gmail.com>
wrote:
> Author: chandlerc
> Date: Tue Jul 1 22:07:15 2014
> New Revision: 212158
>
> URL: http://llvm.org/viewvc/llvm-project?rev=212158&view=rev
> Log:
> [cleanup] Hoist the promotion dispatch logic into the promote function
> so that we can use return to express it more cleanly and avoid so many
> nested switch statements.
>
> Modified:
> llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp?rev=212158&r1=212157&r2=212158&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp Tue Jul 1
> 22:07:15 2014
> @@ -281,27 +281,11 @@ SDValue VectorLegalizer::LegalizeOp(SDVa
>
> switch (TLI.getOperationAction(Node->getOpcode(), QueryType)) {
> case TargetLowering::Promote:
> - switch (Op.getOpcode()) {
> - default:
> - // "Promote" the operation by bitcasting
> - Result = Promote(Op);
> - Changed = true;
> - break;
> - case ISD::SINT_TO_FP:
> - case ISD::UINT_TO_FP:
> - // "Promote" the operation by extending the operand.
> - Result = PromoteINT_TO_FP(Op);
> - Changed = true;
> - break;
> - case ISD::FP_TO_UINT:
> - case ISD::FP_TO_SINT:
> - // Promote the operation by extending the operand.
> - Result = PromoteFP_TO_INT(Op, Op->getOpcode() == ISD::FP_TO_SINT);
> - Changed = true;
> - break;
> - }
> + Result = Promote(Op);
> + Changed = true;
> + break;
> + case TargetLowering::Legal:
> break;
> - case TargetLowering::Legal: break;
> case TargetLowering::Custom: {
> SDValue Tmp1 = TLI.LowerOperation(Op, DAG);
> if (Tmp1.getNode()) {
> @@ -343,9 +327,24 @@ SDValue VectorLegalizer::LegalizeOp(SDVa
> }
>
> SDValue VectorLegalizer::Promote(SDValue Op) {
> - // Vector "promotion" is basically just bitcasting and doing the
> operation
> - // in a different type. For example, x86 promotes ISD::AND on v2i32 to
> - // v1i64.
> + // For a few operations there is a specific concept for promotion based
> on
> + // the operand's type.
> + switch (Op.getOpcode()) {
> + case ISD::SINT_TO_FP:
> + case ISD::UINT_TO_FP:
> + // "Promote" the operation by extending the operand.
> + return PromoteINT_TO_FP(Op);
> + break;
>
Delete the break?
> + case ISD::FP_TO_UINT:
> + case ISD::FP_TO_SINT:
> + // Promote the operation by extending the operand.
> + return PromoteFP_TO_INT(Op, Op->getOpcode() == ISD::FP_TO_SINT);
> + break;
>
Same as above.
+ }
> +
> + // The rest of the time, vector "promotion" is basically just
> bitcasting and
> + // doing the operation in a different type. For example, x86 promotes
> + // ISD::AND on v2i32 to v1i64.
> MVT VT = Op.getSimpleValueType();
> assert(Op.getNode()->getNumValues() == 1 &&
> "Can't promote a vector with multiple results!");
>
>
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>
--
~Craig
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