[llvm] r212153 - Break out subtarget initialization that dependent variables need into
Eric Christopher
echristo at gmail.com
Tue Jul 1 18:14:43 PDT 2014
Author: echristo
Date: Tue Jul 1 20:14:43 2014
New Revision: 212153
URL: http://llvm.org/viewvc/llvm-project?rev=212153&view=rev
Log:
Break out subtarget initialization that dependent variables need into
a separate function and clean up calling convention for helper function.
Modified:
llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
llvm/trunk/lib/Target/Mips/MipsSubtarget.h
Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=212153&r1=212152&r2=212153&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Tue Jul 1 20:14:43 2014
@@ -60,11 +60,9 @@ Mips16ConstantIslands(
/// Select the Mips CPU for the given triple and cpu name.
/// FIXME: Merge with the copy in MipsMCTargetDesc.cpp
-static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) {
+static StringRef selectMipsCPU(Triple TT, StringRef CPU) {
if (CPU.empty() || CPU == "generic") {
- Triple TheTriple(TT);
- if (TheTriple.getArch() == Triple::mips ||
- TheTriple.getArch() == Triple::mipsel)
+ if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel)
CPU = "mips32";
else
CPU = "mips64";
@@ -86,11 +84,9 @@ MipsSubtarget::MipsSubtarget(const std::
InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false),
RM(_RM), OverrideMode(NoOverride), TM(_TM), TargetTriple(TT), JITInfo() {
- std::string CPUName = selectMipsCPU(TT, CPU);
-
- // Parse features string.
- ParseSubtargetFeatures(CPUName, FS);
+ initializeSubtargetDependencies(CPU, FS);
+
if (InMips16Mode && !TM->Options.UseSoftFloat) {
// Hard float for mips16 means essentially to compile as soft float
// but to use a runtime library for soft float that is written with
@@ -103,9 +99,6 @@ MipsSubtarget::MipsSubtarget(const std::
PreviousInMips16Mode = InMips16Mode;
- // Initialize scheduling itinerary for the specified CPU.
- InstrItins = getInstrItineraryForCPU(CPUName);
-
// Don't even attempt to generate code for MIPS-I, MIPS-II, MIPS-III, and
// MIPS-V. They have not been tested and currently exist for the integrated
// assembler only.
@@ -166,6 +159,17 @@ MipsSubtarget::enablePostRAScheduler(Cod
return OptLevel >= CodeGenOpt::Aggressive;
}
+MipsSubtarget &MipsSubtarget::initializeSubtargetDependencies(StringRef CPU,
+ StringRef FS) {
+ std::string CPUName = selectMipsCPU(TargetTriple, CPU);
+
+ // Parse features string.
+ ParseSubtargetFeatures(CPUName, FS);
+ // Initialize scheduling itinerary for the specified CPU.
+ InstrItins = getInstrItineraryForCPU(CPUName);
+ return *this;
+}
+
//FIXME: This logic for reseting the subtarget along with
// the helper classes can probably be simplified but there are a lot of
// cases so we will defer rewriting this to later.
Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=212153&r1=212152&r2=212153&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Tue Jul 1 20:14:43 2014
@@ -245,6 +245,8 @@ public:
/// \brief Reset the subtarget for the Mips target.
void resetSubtarget(MachineFunction *MF);
+ MipsSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
+
/// Does the system support unaligned memory access.
///
/// MIPS32r6/MIPS64r6 require full unaligned access support but does not
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