[PATCH] X86: rework expansion of atomic instructions

[Eric Christopher]

One comment on the caching and use of the target machine, but otherwise looks ok here. I haven't reviewed the actual atomics aspect or the testcase changes yet.

================
Comment at: lib/Target/X86/X86AtomicExpandPass.cpp:88
@@ +87,3 @@
+bool X86AtomicExpandPass::needsCmpXchgNb(llvm::Type *MemType) {
+  const X86Subtarget &Subtarget = TM->getSubtarget<X86Subtarget>();
+  if (!Subtarget.hasCmpxchg16b())
----------------
Is there any way to get this information from TTI instead? Relying on the subtarget here is going to go badly soon.

http://reviews.llvm.org/D4160