[llvm] r211816 - [Stackmaps] Remove the liveness calculation for stackmap intrinsics.
Juergen Ributzka
juergen at apple.com
Thu Jun 26 16:39:45 PDT 2014
Author: ributzka
Date: Thu Jun 26 18:39:44 2014
New Revision: 211816
URL: http://llvm.org/viewvc/llvm-project?rev=211816&view=rev
Log:
[Stackmaps] Remove the liveness calculation for stackmap intrinsics.
There is no need to calculate the liveness information for stackmaps. The
liveness information is still available for the patchpoint intrinsic and
that is also the intended usage model.
Related to <rdar://problem/17473725>
Modified:
llvm/trunk/include/llvm/CodeGen/StackMapLivenessAnalysis.h
llvm/trunk/lib/CodeGen/Passes.cpp
llvm/trunk/lib/CodeGen/StackMapLivenessAnalysis.cpp
llvm/trunk/test/CodeGen/X86/stackmap-liveness.ll
Modified: llvm/trunk/include/llvm/CodeGen/StackMapLivenessAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/StackMapLivenessAnalysis.h?rev=211816&r1=211815&r2=211816&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/StackMapLivenessAnalysis.h (original)
+++ llvm/trunk/include/llvm/CodeGen/StackMapLivenessAnalysis.h Thu Jun 26 18:39:44 2014
@@ -8,8 +8,8 @@
//===----------------------------------------------------------------------===//
//
// This pass calculates the liveness for each basic block in a function and
-// attaches the register live-out information to a stackmap or patchpoint
-// intrinsic if present.
+// attaches the register live-out information to a patchpoint intrinsic (if
+// present).
//
//===----------------------------------------------------------------------===//
@@ -23,14 +23,13 @@
namespace llvm {
/// \brief This pass calculates the liveness information for each basic block in
-/// a function and attaches the register live-out information to a stackmap or
-/// patchpoint intrinsic if present.
+/// a function and attaches the register live-out information to a patchpoint
+/// intrinsic if present.
///
/// This is an optional pass that has to be explicitly enabled via the
-/// -enable-stackmap-liveness and/or -enable-patchpoint-liveness flag. The pass
-/// skips functions that don't have any stackmap or patchpoint intrinsics. The
-/// information provided by this pass is optional and not required by the
-/// aformentioned intrinsics to function.
+/// -enable-patchpoint-liveness flag. The pass skips functions that don't have
+/// any patchpoint intrinsics. The information provided by this pass is optional
+/// and not required by the aformentioned intrinsic to function.
class StackMapLiveness : public MachineFunctionPass {
MachineFunction *MF;
const TargetRegisterInfo *TRI;
Modified: llvm/trunk/lib/CodeGen/Passes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Passes.cpp?rev=211816&r1=211815&r2=211816&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/Passes.cpp (original)
+++ llvm/trunk/lib/CodeGen/Passes.cpp Thu Jun 26 18:39:44 2014
@@ -31,7 +31,6 @@
using namespace llvm;
namespace llvm {
-extern cl::opt<bool> EnableStackMapLiveness;
extern cl::opt<bool> EnablePatchPointLiveness;
}
@@ -566,7 +565,7 @@ void TargetPassConfig::addMachinePasses(
if (addPreEmitPass())
printAndVerify("After PreEmit passes");
- if (EnableStackMapLiveness || EnablePatchPointLiveness)
+ if (EnablePatchPointLiveness)
addPass(&StackMapLivenessID);
}
Modified: llvm/trunk/lib/CodeGen/StackMapLivenessAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackMapLivenessAnalysis.cpp?rev=211816&r1=211815&r2=211816&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/StackMapLivenessAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackMapLivenessAnalysis.cpp Thu Jun 26 18:39:44 2014
@@ -28,8 +28,6 @@ using namespace llvm;
#define DEBUG_TYPE "stackmaps"
namespace llvm {
-cl::opt<bool> EnableStackMapLiveness("enable-stackmap-liveness",
- cl::Hidden, cl::desc("Enable StackMap Liveness Analysis Pass"));
cl::opt<bool> EnablePatchPointLiveness("enable-patchpoint-liveness",
cl::Hidden, cl::desc("Enable PatchPoint Liveness Analysis Pass"));
}
@@ -68,9 +66,8 @@ bool StackMapLiveness::runOnMachineFunct
TRI = MF->getTarget().getRegisterInfo();
++NumStackMapFuncVisited;
- // Skip this function if there are no stackmaps or patchpoints to process.
- if (!((MF->getFrameInfo()->hasStackMap() && EnableStackMapLiveness) ||
- (MF->getFrameInfo()->hasPatchPoint() && EnablePatchPointLiveness))) {
+ // Skip this function if there are no patchpoints to process.
+ if (!(MF->getFrameInfo()->hasPatchPoint() && EnablePatchPointLiveness)) {
++NumStackMapFuncSkipped;
return false;
}
@@ -88,13 +85,11 @@ bool StackMapLiveness::calculateLiveness
LiveRegs.addLiveOuts(MBBI);
bool HasStackMap = false;
// Reverse iterate over all instructions and add the current live register
- // set to an instruction if we encounter a stackmap or patchpoint
- // instruction.
+ // set to an instruction if we encounter a patchpoint instruction.
for (MachineBasicBlock::reverse_iterator I = MBBI->rbegin(),
E = MBBI->rend(); I != E; ++I) {
int Opc = I->getOpcode();
- if ((EnableStackMapLiveness && (Opc == TargetOpcode::STACKMAP)) ||
- (EnablePatchPointLiveness && (Opc == TargetOpcode::PATCHPOINT))) {
+ if (Opc == TargetOpcode::PATCHPOINT) {
addLiveOutSetToMI(*I);
HasChanged = true;
HasStackMap = true;
Modified: llvm/trunk/test/CodeGen/X86/stackmap-liveness.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stackmap-liveness.ll?rev=211816&r1=211815&r2=211816&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stackmap-liveness.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stackmap-liveness.ll Thu Jun 26 18:39:44 2014
@@ -1,6 +1,5 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -disable-fp-elim | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -disable-fp-elim -enable-stackmap-liveness| FileCheck -check-prefix=STACK %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -disable-fp-elim -enable-patchpoint-liveness| FileCheck -check-prefix=PATCH %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -disable-fp-elim -enable-patchpoint-liveness | FileCheck -check-prefix=PATCH %s
;
; Note: Print verbose stackmaps using -debug-only=stackmaps.
@@ -37,36 +36,21 @@ entry:
; Align
; CHECK-NEXT: .align 3
-; StackMap 1 (stackmap liveness information enabled)
-; STACK-LABEL: .long L{{.*}}-_stackmap_liveness
-; STACK-NEXT: .short 0
-; STACK-NEXT: .short 0
-; Padding
-; STACK-NEXT: .short 0
-; Num LiveOut Entries: 2
-; STACK-NEXT: .short 2
-; LiveOut Entry 1: %RSP (8 bytes)
-; STACK-NEXT: .short 7
-; STACK-NEXT: .byte 0
-; STACK-NEXT: .byte 8
-; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
-; STACK-NEXT: .short 19
-; STACK-NEXT: .byte 0
-; STACK-NEXT: .byte 16
-; Align
-; STACK-NEXT: .align 3
-
; StackMap 1 (patchpoint liveness information enabled)
; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness
; PATCH-NEXT: .short 0
; PATCH-NEXT: .short 0
; Padding
; PATCH-NEXT: .short 0
-; Num LiveOut Entries: 0
-; PATCH-NEXT: .short 0
+; Num LiveOut Entries: 1
+; PATCH-NEXT: .short 1
+; LiveOut Entry 1: %YMM2 (16 bytes) --> %XMM2
+; PATCH-NEXT: .short 19
+; PATCH-NEXT: .byte 0
+; PATCH-NEXT: .byte 16
; Align
; PATCH-NEXT: .align 3
- call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 1, i32 5)
+ call anyregcc void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 1, i32 12, i8* null, i32 0)
%a2 = call i64 asm sideeffect "", "={r8}"() nounwind
%a3 = call i8 asm sideeffect "", "={ah}"() nounwind
%a4 = call <4 x double> asm sideeffect "", "={ymm0}"() nounwind
@@ -83,52 +67,37 @@ entry:
; Align
; CHECK-NEXT: .align 3
-; StackMap 2 (stackmap liveness information enabled)
-; STACK-LABEL: .long L{{.*}}-_stackmap_liveness
-; STACK-NEXT: .short 0
-; STACK-NEXT: .short 0
-; Padding
-; STACK-NEXT: .short 0
-; Num LiveOut Entries: 6
-; STACK-NEXT: .short 6
-; LiveOut Entry 1: %RAX (1 bytes) --> %AL or %AH
-; STACK-NEXT: .short 0
-; STACK-NEXT: .byte 0
-; STACK-NEXT: .byte 1
-; LiveOut Entry 2: %RSP (8 bytes)
-; STACK-NEXT: .short 7
-; STACK-NEXT: .byte 0
-; STACK-NEXT: .byte 8
-; LiveOut Entry 3: %R8 (8 bytes)
-; STACK-NEXT: .short 8
-; STACK-NEXT: .byte 0
-; STACK-NEXT: .byte 8
-; LiveOut Entry 4: %YMM0 (32 bytes)
-; STACK-NEXT: .short 17
-; STACK-NEXT: .byte 0
-; STACK-NEXT: .byte 32
-; LiveOut Entry 5: %YMM1 (32 bytes)
-; STACK-NEXT: .short 18
-; STACK-NEXT: .byte 0
-; STACK-NEXT: .byte 32
-; LiveOut Entry 6: %YMM2 (16 bytes) --> %XMM2
-; STACK-NEXT: .short 19
-; STACK-NEXT: .byte 0
-; STACK-NEXT: .byte 16
-; Align
-; STACK-NEXT: .align 3
-
; StackMap 2 (patchpoint liveness information enabled)
; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness
; PATCH-NEXT: .short 0
; PATCH-NEXT: .short 0
; Padding
; PATCH-NEXT: .short 0
-; Num LiveOut Entries: 0
+; Num LiveOut Entries: 5
+; PATCH-NEXT: .short 5
+; LiveOut Entry 1: %RAX (1 bytes) --> %AL or %AH
; PATCH-NEXT: .short 0
+; PATCH-NEXT: .byte 0
+; PATCH-NEXT: .byte 1
+; LiveOut Entry 2: %R8 (8 bytes)
+; PATCH-NEXT: .short 8
+; PATCH-NEXT: .byte 0
+; PATCH-NEXT: .byte 8
+; LiveOut Entry 3: %YMM0 (32 bytes)
+; PATCH-NEXT: .short 17
+; PATCH-NEXT: .byte 0
+; PATCH-NEXT: .byte 32
+; LiveOut Entry 4: %YMM1 (32 bytes)
+; PATCH-NEXT: .short 18
+; PATCH-NEXT: .byte 0
+; PATCH-NEXT: .byte 32
+; LiveOut Entry 5: %YMM2 (16 bytes) --> %XMM2
+; PATCH-NEXT: .short 19
+; PATCH-NEXT: .byte 0
+; PATCH-NEXT: .byte 16
; Align
; PATCH-NEXT: .align 3
- call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 2, i32 5)
+ call anyregcc void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 2, i32 12, i8* null, i32 0)
call void asm sideeffect "", "{r8},{ah},{ymm0},{ymm1}"(i64 %a2, i8 %a3, <4 x double> %a4, <4 x double> %a5) nounwind
; StackMap 3 (no liveness information available)
@@ -142,36 +111,25 @@ entry:
; Align
; CHECK-NEXT: .align 3
-; StackMap 3 (stackmap liveness information enabled)
-; STACK-LABEL: .long L{{.*}}-_stackmap_liveness
-; STACK-NEXT: .short 0
-; STACK-NEXT: .short 0
-; Padding
-; STACK-NEXT: .short 0
-; Num LiveOut Entries: 2
-; STACK-NEXT: .short 2
-; LiveOut Entry 1: %RSP (8 bytes)
-; STACK-NEXT: .short 7
-; STACK-NEXT: .byte 0
-; STACK-NEXT: .byte 8
-; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
-; STACK-NEXT: .short 19
-; STACK-NEXT: .byte 0
-; STACK-NEXT: .byte 16
-; Align
-; STACK-NEXT: .align 3
-
; StackMap 3 (patchpoint liveness information enabled)
; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness
; PATCH-NEXT: .short 0
; PATCH-NEXT: .short 0
; Padding
; PATCH-NEXT: .short 0
-; Num LiveOut Entries: 0
-; PATCH-NEXT: .short 0
+; Num LiveOut Entries: 2
+; PATCH-NEXT: .short 2
+; LiveOut Entry 1: %RSP (8 bytes)
+; PATCH-NEXT: .short 7
+; PATCH-NEXT: .byte 0
+; PATCH-NEXT: .byte 8
+; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
+; PATCH-NEXT: .short 19
+; PATCH-NEXT: .byte 0
+; PATCH-NEXT: .byte 16
; Align
; PATCH-NEXT: .align 3
- call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 3, i32 5)
+ call anyregcc void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 3, i32 12, i8* null, i32 0)
call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind
ret void
}
@@ -179,33 +137,6 @@ entry:
define void @mixed_liveness() {
entry:
%a1 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind
-; StackMap 4 (stackmap liveness information enabled)
-; STACK-LABEL: .long L{{.*}}-_mixed_liveness
-; STACK-NEXT: .short 0
-; STACK-NEXT: .short 0
-; Padding
-; STACK-NEXT: .short 0
-; Num LiveOut Entries: 1
-; STACK-NEXT: .short 1
-; LiveOut Entry 1: %YMM2 (16 bytes) --> %XMM2
-; STACK-NEXT: .short 19
-; STACK-NEXT: .byte 0
-; STACK-NEXT: .byte 16
-; Align
-; STACK-NEXT: .align 3
-
-
-; StackMap 5 (stackmap liveness information enabled)
-; STACK-LABEL: .long L{{.*}}-_mixed_liveness
-; STACK-NEXT: .short 0
-; STACK-NEXT: .short 0
-; Padding
-; STACK-NEXT: .short 0
-; Num LiveOut Entries: 0
-; STACK-NEXT: .short 0
-; Align
-; STACK-NEXT: .align 3
-
; StackMap 4 (patchpoint liveness information enabled)
; PATCH-LABEL: .long L{{.*}}-_mixed_liveness
; PATCH-NEXT: .short 0
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