[llvm] r211515 - R600: Don't set fp_round_inreg action.
Matt Arsenault
Matthew.Arsenault at amd.com
Mon Jun 23 11:00:41 PDT 2014
Author: arsenm
Date: Mon Jun 23 13:00:41 2014
New Revision: 211515
URL: http://llvm.org/viewvc/llvm-project?rev=211515&view=rev
Log:
R600: Don't set fp_round_inreg action.
There's no point in setting this since it seems to only
by created in 1 place for ppcf128
Modified:
llvm/trunk/lib/Target/R600/AMDILISelLowering.cpp
Modified: llvm/trunk/lib/Target/R600/AMDILISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDILISelLowering.cpp?rev=211515&r1=211514&r2=211515&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDILISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDILISelLowering.cpp Mon Jun 23 13:00:41 2014
@@ -33,11 +33,6 @@ void AMDGPUTargetLowering::InitAMDILLowe
MVT::v2i32
};
- static const MVT::SimpleValueType FloatTypes[] = {
- MVT::f32,
- MVT::f64
- };
-
static const MVT::SimpleValueType VectorTypes[] = {
MVT::v4f32,
MVT::v4i32,
@@ -57,10 +52,6 @@ void AMDGPUTargetLowering::InitAMDILLowe
setOperationAction(ISD::BRIND, VT, Expand);
}
- for (MVT VT : FloatTypes) {
- setOperationAction(ISD::FP_ROUND_INREG, VT, Expand);
- }
-
for (MVT VT : VectorTypes) {
setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand);
setOperationAction(ISD::SELECT_CC, VT, Expand);
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