[PATCH 2/3] R600: Use existing SDIVREM for i64

[Matt Arsenault]

On Jun 21, 2014, at 4:24 PM, Jan Vesely <jan.vesely at rutgers.edu> wrote:

> Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
> ---
> lib/Target/R600/AMDGPUISelLowering.cpp | 25 +++++++++++++++++++++++++
> lib/Target/R600/R600ISelLowering.cpp   |  2 ++
> 2 files changed, 27 insertions(+)
> 
> diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
> index d613659..f473d1d 100644
> --- a/lib/Target/R600/AMDGPUISelLowering.cpp
> +++ b/lib/Target/R600/AMDGPUISelLowering.cpp
> @@ -626,6 +626,31 @@ void AMDGPUTargetLowering::ReplaceNodeResults(SDNode *N,
>     Results.push_back(REM);
>     break;
>   }
> +  case ISD::SDIV: {
> +    SDValue Op = SDValue(N, 0);
> +    SDLoc DL(Op);
> +    EVT VT = Op.getValueType();
> +    SDValue SDIVREM = DAG.getNode(ISD::SDIVREM, DL, DAG.getVTList(VT, VT),
> +      N->getOperand(0), N->getOperand(1));
> +    Results.push_back(SDIVREM);
> +    break;
> +  }
> +  case ISD::SREM: {
> +    SDValue Op = SDValue(N, 0);
> +    SDLoc DL(Op);
> +    EVT VT = Op.getValueType();
> +    SDValue SDIVREM = DAG.getNode(ISD::SDIVREM, DL, DAG.getVTList(VT, VT),
> +      N->getOperand(0), N->getOperand(1));
> +    Results.push_back(SDIVREM.getValue(1));
> +    break;
> +  }
> +  case ISD::SDIVREM: {
> +    SDValue Op = SDValue(N, 1);
> +    SDValue RES = LowerSDIVREM(Op, DAG);
> +    Results.push_back(RES);
> +    Results.push_back(RES.getValue(1));
> +    break;
> +  }
>   default:
>     return;
>   }

These should go in R600ISelLowering’s ReplaceNodeResults since i64 is legal on SI


> diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp
> index f0e13e5..9ab6aa4 100644
> --- a/lib/Target/R600/R600ISelLowering.cpp
> +++ b/lib/Target/R600/R600ISelLowering.cpp
> @@ -156,6 +156,8 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
>   // during Type Legalization
>   setOperationAction(ISD::UDIV, MVT::i64, Custom);
>   setOperationAction(ISD::UREM, MVT::i64, Custom);
> +  setOperationAction(ISD::SDIV, MVT::i64, Custom);
> +  setOperationAction(ISD::SREM, MVT::i64, Custom);
> 
>   // We don't have 64-bit shifts. Thus we need either SHX i64 or SHX_PARTS i32
>   //  to be Legal/Custom in order to avoid library calls.
> -- 
> 1.9.3
> 
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