[PATCH] [x86] Teach the X86 backend to DAG-combine SSE2 shuffles that are trivially redundant.
Chandler Carruth
chandlerc at gmail.com
Sat Jun 21 09:39:43 PDT 2014
Hi grosbach, filcab,
This fixes several cases in the new vector shuffle lowering algorithm which would generate redundant shuffle instructions for the sake of simplicity.
I'm also deleting a testcase which was somewhat ridiculous. It was checking for a bug in 2007 about incorrectly transforming shuffles by looking for the string "-86" in the output of a pretty substantial function. This test case doesn't seem to have any value at this point.
Builds on top of: http://reviews.llvm.org/D4225
http://reviews.llvm.org/D4240
Files:
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll
test/CodeGen/X86/vector-shuffle-128-v8.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D4240.10721.patch
Type: text/x-patch
Size: 10153 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20140621/d9bb129b/attachment.bin>
More information about the llvm-commits
mailing list