[PATCH] [x86] Begin a significant overhaul of how vector lowering is done in the x86 backend.

Philip Reames listmail at philipreames.com
Fri Jun 20 15:15:04 PDT 2014


Thank you for working on this.  This definitely seems like a workable 
approach and I'm very glad to see it happen.

Philip

On 06/19/2014 06:21 PM, Chandler Carruth wrote:
> Hi grosbach, filcab,
>
> This sketches out a new code path for vector lowering, hidden behind an
> off-by-default flag while it is under development. The fundamental idea
> behind the new code path is to aggressively break down the problem space
> in ways that ease selecting the odd set of instructions available on
> x86, and carefully avoid scalarizing code even when forced to use older
> ISAs. Notably, this starts off restricting itself to SSE2 and implements
> the complete vector shuffle and blend space for 128-bit vectors in SSE2
> without scalarizing. The plan is to layer on top of this ISA extensions
> where we can bail out of the complex SSE2 lowering and opt for
> a cheaper, specialized instruction (or set of instructions). It also
> needs to be generalized to AVX and AVX512 vector widths.
>
> Currently, this does a decent but not perfect job for SSE2. There are
> some specific shortcomings that I plan to address:
> - We need a peephole combine to fold together shuffles where possible.
>    There are cases where a previous shuffle could be modified slightly to
>    arrange for elements to be in the correct position and a later shuffle
>    eliminated. Doing this eagerly added quite a bit of complexity, and
>    so my plan is to combine away these redundancies afterward.
> - There are a lot more clever ways to use unpck and pack that need to be
>    added. This is essential for real world shuffles as it turns out...
>
> Once SSE2 is polished a bit I should be able to get interesting numbers
> on performance improvements on benchmarks conducive to vectorization.
> All of this will be off by default until it is functionally equivalent
> of course.
>
> http://reviews.llvm.org/D4225
>
> Files:
>    lib/Target/X86/X86ISelLowering.cpp
>    test/CodeGen/X86/vector-shuffle-128-v16.ll
>    test/CodeGen/X86/vector-shuffle-128-v2.ll
>    test/CodeGen/X86/vector-shuffle-128-v4.ll
>    test/CodeGen/X86/vector-shuffle-128-v8.ll
>
>
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