[PATCH] R600: Handle fnearbyint

[Tom Stellard]

On Wed, Jun 18, 2014 at 05:17:12PM +0000, Matt Arsenault wrote:
> The difference from rint isn't really relevant here,
> so treat them as equivalent. OpenCL doesn't have nearbyint,
> so this is sort of pointless other than for completeness.
> 

LGTM.

> http://reviews.llvm.org/D4195
> 
> Files:
>   lib/Target/R600/AMDGPUISelLowering.cpp
>   lib/Target/R600/AMDGPUISelLowering.h
>   test/CodeGen/R600/fnearbyint.ll

> Index: lib/Target/R600/AMDGPUISelLowering.cpp
> ===================================================================
> --- lib/Target/R600/AMDGPUISelLowering.cpp
> +++ lib/Target/R600/AMDGPUISelLowering.cpp
> @@ -128,6 +128,9 @@
>  
>    setOperationAction(ISD::FREM, MVT::f32, Custom);
>    setOperationAction(ISD::FREM, MVT::f64, Custom);
> +  setOperationAction(ISD::FNEARBYINT, MVT::f32, Custom);
> +  setOperationAction(ISD::FNEARBYINT, MVT::f64, Custom);
> +
>  
>    // Lower floating point store/load to integer store/load to reduce the number
>    // of patterns in tablegen.
> @@ -328,6 +331,7 @@
>      setOperationAction(ISD::FTRUNC, VT, Expand);
>      setOperationAction(ISD::FMUL, VT, Expand);
>      setOperationAction(ISD::FRINT, VT, Expand);
> +    setOperationAction(ISD::FNEARBYINT, VT, Expand);
>      setOperationAction(ISD::FSQRT, VT, Expand);
>      setOperationAction(ISD::FSIN, VT, Expand);
>      setOperationAction(ISD::FSUB, VT, Expand);
> @@ -505,6 +509,7 @@
>    case ISD::FCEIL: return LowerFCEIL(Op, DAG);
>    case ISD::FTRUNC: return LowerFTRUNC(Op, DAG);
>    case ISD::FRINT: return LowerFRINT(Op, DAG);
> +  case ISD::FNEARBYINT: return LowerFNEARBYINT(Op, DAG);
>    case ISD::FFLOOR: return LowerFFLOOR(Op, DAG);
>    case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG);
>  
> @@ -1714,6 +1719,13 @@
>    return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2);
>  }
>  
> +SDValue AMDGPUTargetLowering::LowerFNEARBYINT(SDValue Op, SelectionDAG &DAG) const {
> +  // FNEARBYINT and FRINT are the same, except in their handling of FP
> +  // exceptions. Those aren't really meaningful for us, and OpenCL only has
> +  // rint, so just treat them as equivalent.
> +  return DAG.getNode(ISD::FRINT, SDLoc(Op), Op.getValueType(), Op.getOperand(0));
> +}
> +
>  SDValue AMDGPUTargetLowering::LowerFFLOOR(SDValue Op, SelectionDAG &DAG) const {
>    SDLoc SL(Op);
>    SDValue Src = Op.getOperand(0);
> Index: lib/Target/R600/AMDGPUISelLowering.h
> ===================================================================
> --- lib/Target/R600/AMDGPUISelLowering.h
> +++ lib/Target/R600/AMDGPUISelLowering.h
> @@ -58,6 +58,7 @@
>    SDValue LowerFREM(SDValue Op, SelectionDAG &DAG) const;
>  >>>>>>> 6a5b0b0... R600: Custom lower frem
>    SDValue LowerFRINT(SDValue Op, SelectionDAG &DAG) const;
> +  SDValue LowerFNEARBYINT(SDValue Op, SelectionDAG &DAG) const;
>    SDValue LowerFFLOOR(SDValue Op, SelectionDAG &DAG) const;
>  
>    SDValue LowerUINT_TO_FP(SDValue Op, SelectionDAG &DAG) const;
> Index: test/CodeGen/R600/fnearbyint.ll
> ===================================================================
> --- /dev/null
> +++ test/CodeGen/R600/fnearbyint.ll
> @@ -0,0 +1,57 @@
> +; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s
> +; RUN: llc -march=r600 -mcpu=bonaire -verify-machineinstrs < %s
> +
> +; This should have the exactly the same output as the test for rint,
> +; so no need to check anything.
> +
> +declare float @llvm.nearbyint.f32(float) #0
> +declare <2 x float> @llvm.nearbyint.v2f32(<2 x float>) #0
> +declare <4 x float> @llvm.nearbyint.v4f32(<4 x float>) #0
> +declare double @llvm.nearbyint.f64(double) #0
> +declare <2 x double> @llvm.nearbyint.v2f64(<2 x double>) #0
> +declare <4 x double> @llvm.nearbyint.v4f64(<4 x double>) #0
> +
> +
> +define void @fnearbyint_f32(float addrspace(1)* %out, float %in) #1 {
> +entry:
> +  %0 = call float @llvm.nearbyint.f32(float %in)
> +  store float %0, float addrspace(1)* %out
> +  ret void
> +}
> +
> +define void @fnearbyint_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) #1 {
> +entry:
> +  %0 = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %in)
> +  store <2 x float> %0, <2 x float> addrspace(1)* %out
> +  ret void
> +}
> +
> +define void @fnearbyint_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) #1 {
> +entry:
> +  %0 = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %in)
> +  store <4 x float> %0, <4 x float> addrspace(1)* %out
> +  ret void
> +}
> +
> +define void @nearbyint_f64(double addrspace(1)* %out, double %in) {
> +entry:
> +  %0 = call double @llvm.nearbyint.f64(double %in)
> +  store double %0, double addrspace(1)* %out
> +  ret void
> +}
> +define void @nearbyint_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %in) {
> +entry:
> +  %0 = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %in)
> +  store <2 x double> %0, <2 x double> addrspace(1)* %out
> +  ret void
> +}
> +
> +define void @nearbyint_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %in) {
> +entry:
> +  %0 = call <4 x double> @llvm.nearbyint.v4f64(<4 x double> %in)
> +  store <4 x double> %0, <4 x double> addrspace(1)* %out
> +  ret void
> +}
> +
> +attributes #0 = { nounwind readonly }
> +attributes #1 = { nounwind }

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