[PATCH] Add support to recognize non SIMD kind of parallelism in SLPVectorizer

[Karthik Bhat]

Hi Arnold,
Thanks for the review comments. Updated the patch to use shuffle cost of 2. I have modified getShuffleCost in BasicTargetTransformInfo and TargetTransformInfo as X86TargetTransformInfo::getShuffleCost and ARMTargetTransformInfo::getShuffleCost gets the cost from this common function.

Yes addsub instruction is not yet emitted by backend. We will need some more modification to recognize this shuffle as addsub instruction and generate corresponding target instruction. I will look into it once these changes are committed. Will also try to update the cost model to use getAddSubCost in followup patches.
Does this look good to commit now? Thanks once again for the review.
Regards
Karthik Bhat

http://reviews.llvm.org/D4015

Files:
  include/llvm/Analysis/TargetTransformInfo.h
  lib/Analysis/TargetTransformInfo.cpp
  lib/CodeGen/BasicTargetTransformInfo.cpp
  lib/Transforms/Vectorize/SLPVectorizer.cpp
  test/Transforms/SLPVectorizer/X86/addsub.ll
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