[PATCH] [ValueTracking] Consider the bounds of PTX special registers

Mark Heffernan meheff at google.com
Mon Jun 16 09:51:28 PDT 2014


================
Comment at: lib/Analysis/ValueTracking.cpp:759
@@ +758,3 @@
+      // index.html#compute-capabilities).
+      // Leveraing the bounds of these special registers can lead to more
+      // precise value analysis.
----------------
spelling nit: levaraging

================
Comment at: lib/Analysis/ValueTracking.cpp:778
@@ -756,1 +777,3 @@
+        KnownZero = APInt::getHighBitsSet(32, 32 - 16);
+        break;
       }
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These values seem to be CUDA version specific.  Is there any way of guarding these?  And how will we know to update these when CUDA N+1 is supported with different values?

http://reviews.llvm.org/D4150






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