[llvm] r210899 - [mips][mips64r6] bc1any[24] are not available on MIPS32r6/MIPS64r6
Daniel Sanders
daniel.sanders at imgtec.com
Fri Jun 13 06:08:38 PDT 2014
Author: dsanders
Date: Fri Jun 13 08:08:38 2014
New Revision: 210899
URL: http://llvm.org/viewvc/llvm-project?rev=210899&view=rev
Log:
[mips][mips64r6] bc1any[24] are not available on MIPS32r6/MIPS64r6
Summary:
These MIPS-3D instructions have never been implemented in LLVM so we only
add testcases.
Reviewers: zoran.jovanovic, jkolek, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4115
Added:
llvm/trunk/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s
Modified:
llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td
llvm/trunk/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s
Modified: llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td?rev=210899&r1=210898&r2=210899&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td Fri Jun 13 08:08:38 2014
@@ -25,7 +25,6 @@ include "Mips32r6InstrFormats.td"
// Reencoded: sdbbp
// Reencoded: sdc2
// Reencoded: swc2
-// Removed: bc1any2, bc1any4
// Rencoded: [ls][wd]c2
def brtarget21 : Operand<OtherVT> {
Added: llvm/trunk/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s?rev=210899&view=auto
==============================================================================
--- llvm/trunk/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s (added)
+++ llvm/trunk/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s Fri Jun 13 08:08:38 2014
@@ -0,0 +1,11 @@
+# Instructions that are invalid but currently emit the wrong error message.
+#
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \
+# RUN: 2>%t1
+# RUN: FileCheck %s < %t1
+
+ .set noat
+ bc1any2f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1any2t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1any4f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1any4t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
Modified: llvm/trunk/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s?rev=210899&r1=210898&r2=210899&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s (original)
+++ llvm/trunk/test/MC/Mips/mips64r6/invalid-mips5-wrong-error.s Fri Jun 13 08:08:38 2014
@@ -1,4 +1,4 @@
-# Instructions that are invalid
+# Instructions that are invalid but currently emit the wrong error message.
#
# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \
# RUN: 2>%t1
@@ -8,6 +8,10 @@
abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
alnv.ps $f12,$f18,$f30,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1any2f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1any2t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1any4f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1any4t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
c.f.ps $fcc6,$f11,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
c.le.ps $fcc1,$f7,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
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