[PATCH 5/6] R600: Add 64 bit ctlz/cttz tests.

[Jan Vesely]

cp + s/ctpop/ctlz/
Don't enable for EG (assertion failure in loads)

Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
---


 test/CodeGen/R600/ctlz64.ll  | 92 ++++++++++++++++++++++++++++++++++++++++++++
 test/CodeGen/R600/ctpop64.ll |  1 +
 test/CodeGen/R600/cttz64.ll  | 92 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 185 insertions(+)
 create mode 100644 test/CodeGen/R600/ctlz64.ll
 create mode 100644 test/CodeGen/R600/cttz64.ll

diff --git a/test/CodeGen/R600/ctlz64.ll b/test/CodeGen/R600/ctlz64.ll
new file mode 100644
index 0000000..39820d5
--- /dev/null
+++ b/test/CodeGen/R600/ctlz64.ll
@@ -0,0 +1,92 @@
+; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; XUN llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
+
+declare i64 @llvm.ctlz.i64(i64) nounwind readnone
+declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>) nounwind readnone
+declare <4 x i64> @llvm.ctlz.v4i64(<4 x i64>) nounwind readnone
+declare <8 x i64> @llvm.ctlz.v8i64(<8 x i64>) nounwind readnone
+declare <16 x i64> @llvm.ctlz.v16i64(<16 x i64>) nounwind readnone
+
+; FUNC-LABEL: @s_ctlz_i64:
+; SI: S_LOAD_DWORDX2 [[SVAL:s\[[0-9]+:[0-9]+\]]],
+; SI: S_BCNT1_I32_B64 [[SRESULT:s[0-9]+]], [[SVAL]]
+; SI: V_MOV_B32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]]
+; SI: BUFFER_STORE_DWORD [[VRESULT]],
+; SI: S_ENDPGM
+define void @s_ctlz_i64(i32 addrspace(1)* noalias %out, i64 %val) nounwind {
+  %ctlz = call i64 @llvm.ctlz.i64(i64 %val) nounwind readnone
+  %truncctlz = trunc i64 %ctlz to i32
+  store i32 %truncctlz, i32 addrspace(1)* %out, align 4
+  ret void
+}
+
+; FUNC-LABEL: @v_ctlz_i64:
+; SI: BUFFER_LOAD_DWORDX2 v{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}},
+; SI: V_MOV_B32_e32 [[VZERO:v[0-9]+]], 0
+; SI: V_BCNT_U32_B32_e32 [[MIDRESULT:v[0-9]+]], v[[LOVAL]], [[VZERO]]
+; SI-NEXT: V_BCNT_U32_B32_e32 [[RESULT:v[0-9]+]], v[[HIVAL]], [[MIDRESULT]]
+; SI: BUFFER_STORE_DWORD [[RESULT]],
+; SI: S_ENDPGM
+define void @v_ctlz_i64(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
+  %val = load i64 addrspace(1)* %in, align 8
+  %ctlz = call i64 @llvm.ctlz.i64(i64 %val) nounwind readnone
+  %truncctlz = trunc i64 %ctlz to i32
+  store i32 %truncctlz, i32 addrspace(1)* %out, align 4
+  ret void
+}
+
+; FUNC-LABEL: @s_ctlz_v2i64:
+; SI: S_BCNT1_I32_B64
+; SI: S_BCNT1_I32_B64
+; SI: S_ENDPGM
+define void @s_ctlz_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> %val) nounwind {
+  %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %val) nounwind readnone
+  %truncctlz = trunc <2 x i64> %ctlz to <2 x i32>
+  store <2 x i32> %truncctlz, <2 x i32> addrspace(1)* %out, align 8
+  ret void
+}
+
+; FUNC-LABEL: @s_ctlz_v4i64:
+; SI: S_BCNT1_I32_B64
+; SI: S_BCNT1_I32_B64
+; SI: S_BCNT1_I32_B64
+; SI: S_BCNT1_I32_B64
+; SI: S_ENDPGM
+define void @s_ctlz_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> %val) nounwind {
+  %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %val) nounwind readnone
+  %truncctlz = trunc <4 x i64> %ctlz to <4 x i32>
+  store <4 x i32> %truncctlz, <4 x i32> addrspace(1)* %out, align 16
+  ret void
+}
+
+; FUNC-LABEL: @v_ctlz_v2i64:
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: S_ENDPGM
+define void @v_ctlz_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %in) nounwind {
+  %val = load <2 x i64> addrspace(1)* %in, align 16
+  %ctlz = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %val) nounwind readnone
+  %truncctlz = trunc <2 x i64> %ctlz to <2 x i32>
+  store <2 x i32> %truncctlz, <2 x i32> addrspace(1)* %out, align 8
+  ret void
+}
+
+; FUNC-LABEL: @v_ctlz_v4i64:
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: S_ENDPGM
+define void @v_ctlz_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> addrspace(1)* noalias %in) nounwind {
+  %val = load <4 x i64> addrspace(1)* %in, align 32
+  %ctlz = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %val) nounwind readnone
+  %truncctlz = trunc <4 x i64> %ctlz to <4 x i32>
+  store <4 x i32> %truncctlz, <4 x i32> addrspace(1)* %out, align 16
+  ret void
+}
diff --git a/test/CodeGen/R600/ctpop64.ll b/test/CodeGen/R600/ctpop64.ll
index 798d8f5..72e937e 100644
--- a/test/CodeGen/R600/ctpop64.ll
+++ b/test/CodeGen/R600/ctpop64.ll
@@ -1,4 +1,5 @@
 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; XUN llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
 
 declare i64 @llvm.ctpop.i64(i64) nounwind readnone
 declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>) nounwind readnone
diff --git a/test/CodeGen/R600/cttz64.ll b/test/CodeGen/R600/cttz64.ll
new file mode 100644
index 0000000..c09e5d7
--- /dev/null
+++ b/test/CodeGen/R600/cttz64.ll
@@ -0,0 +1,92 @@
+; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; XUN llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
+
+declare i64 @llvm.cttz.i64(i64) nounwind readnone
+declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>) nounwind readnone
+declare <4 x i64> @llvm.cttz.v4i64(<4 x i64>) nounwind readnone
+declare <8 x i64> @llvm.cttz.v8i64(<8 x i64>) nounwind readnone
+declare <16 x i64> @llvm.cttz.v16i64(<16 x i64>) nounwind readnone
+
+; FUNC-LABEL: @s_cttz_i64:
+; SI: S_LOAD_DWORDX2 [[SVAL:s\[[0-9]+:[0-9]+\]]],
+; SI: S_BCNT1_I32_B64 [[SRESULT:s[0-9]+]]
+; SI: V_MOV_B32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]]
+; SI: BUFFER_STORE_DWORD [[VRESULT]],
+; SI: S_ENDPGM
+define void @s_cttz_i64(i32 addrspace(1)* noalias %out, i64 %val) nounwind {
+  %cttz = call i64 @llvm.cttz.i64(i64 %val) nounwind readnone
+  %trunccttz = trunc i64 %cttz to i32
+  store i32 %trunccttz, i32 addrspace(1)* %out, align 4
+  ret void
+}
+
+; FUNC-LABEL: @v_cttz_i64:
+; SI: BUFFER_LOAD_DWORDX2 v{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}},
+; SI: V_MOV_B32_e32 [[VZERO:v[0-9]+]], 0
+; SI: V_BCNT_U32_B32_e32 [[MIDRESULT:v[0-9]+]], v[[LOVAL]], [[VZERO]]
+; SI-NEXT: V_BCNT_U32_B32_e32 [[RESULT:v[0-9]+]], v[[HIVAL]], [[MIDRESULT]]
+; SI: BUFFER_STORE_DWORD [[RESULT]],
+; SI: S_ENDPGM
+define void @v_cttz_i64(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
+  %val = load i64 addrspace(1)* %in, align 8
+  %cttz = call i64 @llvm.cttz.i64(i64 %val) nounwind readnone
+  %trunccttz = trunc i64 %cttz to i32
+  store i32 %trunccttz, i32 addrspace(1)* %out, align 4
+  ret void
+}
+
+; FUNC-LABEL: @s_cttz_v2i64:
+; SI: S_BCNT1_I32_B64
+; SI: S_BCNT1_I32_B64
+; SI: S_ENDPGM
+define void @s_cttz_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> %val) nounwind {
+  %cttz = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %val) nounwind readnone
+  %trunccttz = trunc <2 x i64> %cttz to <2 x i32>
+  store <2 x i32> %trunccttz, <2 x i32> addrspace(1)* %out, align 8
+  ret void
+}
+
+; FUNC-LABEL: @s_cttz_v4i64:
+; SI: S_BCNT1_I32_B64
+; SI: S_BCNT1_I32_B64
+; SI: S_BCNT1_I32_B64
+; SI: S_BCNT1_I32_B64
+; SI: S_ENDPGM
+define void @s_cttz_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> %val) nounwind {
+  %cttz = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %val) nounwind readnone
+  %trunccttz = trunc <4 x i64> %cttz to <4 x i32>
+  store <4 x i32> %trunccttz, <4 x i32> addrspace(1)* %out, align 16
+  ret void
+}
+
+; FUNC-LABEL: @v_cttz_v2i64:
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: S_ENDPGM
+define void @v_cttz_v2i64(<2 x i32> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %in) nounwind {
+  %val = load <2 x i64> addrspace(1)* %in, align 16
+  %cttz = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %val) nounwind readnone
+  %trunccttz = trunc <2 x i64> %cttz to <2 x i32>
+  store <2 x i32> %trunccttz, <2 x i32> addrspace(1)* %out, align 8
+  ret void
+}
+
+; FUNC-LABEL: @v_cttz_v4i64:
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: V_BCNT_U32_B32
+; SI: S_ENDPGM
+define void @v_cttz_v4i64(<4 x i32> addrspace(1)* noalias %out, <4 x i64> addrspace(1)* noalias %in) nounwind {
+  %val = load <4 x i64> addrspace(1)* %in, align 32
+  %cttz = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %val) nounwind readnone
+  %trunccttz = trunc <4 x i64> %cttz to <4 x i32>
+  store <4 x i32> %trunccttz, <4 x i32> addrspace(1)* %out, align 16
+  ret void
+}
-- 
1.9.3