[llvm] r210782 - This removes TODO added in http://reviews.llvm.org/D3658
Dinesh Dwivedi
dinesh.d at samsung.com
Thu Jun 12 07:06:00 PDT 2014
Author: dinesh
Date: Thu Jun 12 09:06:00 2014
New Revision: 210782
URL: http://llvm.org/viewvc/llvm-project?rev=210782&view=rev
Log:
This removes TODO added in http://reviews.llvm.org/D3658
The patch transforms
ABS(NABS(X)) -> ABS(X)
NABS(ABS(X)) -> NABS(X)
Differential Revision: http://reviews.llvm.org/D4040
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineSelect.cpp
llvm/trunk/test/Transforms/InstCombine/abs_abs.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineSelect.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineSelect.cpp?rev=210782&r1=210781&r2=210782&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineSelect.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineSelect.cpp Thu Jun 12 09:06:00 2014
@@ -733,8 +733,15 @@ Instruction *InstCombiner::FoldSPFofSPF(
return ReplaceInstUsesWith(Outer, Inner);
}
- // TODO: ABS(NABS(X)) -> ABS(X)
- // TODO: NABS(ABS(X)) -> NABS(X)
+ // ABS(NABS(X)) -> ABS(X)
+ // NABS(ABS(X)) -> NABS(X)
+ if ((SPF1 == SPF_ABS && SPF2 == SPF_NABS) ||
+ (SPF1 == SPF_NABS && SPF2 == SPF_ABS)) {
+ SelectInst *SI = cast<SelectInst>(Inner);
+ Value *NewSI = Builder->CreateSelect(
+ SI->getCondition(), SI->getFalseValue(), SI->getTrueValue());
+ return ReplaceInstUsesWith(Outer, NewSI);
+ }
return nullptr;
}
Modified: llvm/trunk/test/Transforms/InstCombine/abs_abs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/abs_abs.ll?rev=210782&r1=210781&r2=210782&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/abs_abs.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/abs_abs.ll Thu Jun 12 09:06:00 2014
@@ -479,3 +479,483 @@ define i32 @nabs_nabs_x16(i32 %x) {
; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
; CHECK-NEXT: ret i32 [[SEL]]
}
+
+define i32 @abs_nabs_x01(i32 %x) {
+ %cmp = icmp sgt i32 %x, -1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x01(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x02(i32 %x) {
+ %cmp = icmp sgt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x02(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x03(i32 %x) {
+ %cmp = icmp slt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x03(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x04(i32 %x) {
+ %cmp = icmp slt i32 %x, 1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x04(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x05(i32 %x) {
+ %cmp = icmp sgt i32 %x, -1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp sgt i32 %cond, 0
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x05(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x06(i32 %x) {
+ %cmp = icmp sgt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp sgt i32 %cond, 0
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x06(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x07(i32 %x) {
+ %cmp = icmp slt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp sgt i32 %cond, 0
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x07(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x08(i32 %x) {
+ %cmp = icmp slt i32 %x, 1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp sgt i32 %cond, 0
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x08(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x09(i32 %x) {
+ %cmp = icmp sgt i32 %x, -1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp slt i32 %cond, 0
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x09(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x10(i32 %x) {
+ %cmp = icmp sgt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp slt i32 %cond, 0
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x10(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x11(i32 %x) {
+ %cmp = icmp slt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp slt i32 %cond, 0
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x11(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x12(i32 %x) {
+ %cmp = icmp slt i32 %x, 1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp slt i32 %cond, 0
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x12(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x13(i32 %x) {
+ %cmp = icmp sgt i32 %x, -1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp slt i32 %cond, 1
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x13(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x14(i32 %x) {
+ %cmp = icmp sgt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp slt i32 %cond, 1
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x14(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x15(i32 %x) {
+ %cmp = icmp slt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp slt i32 %cond, 1
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x15(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @abs_nabs_x16(i32 %x) {
+ %cmp = icmp slt i32 %x, 1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp slt i32 %cond, 1
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @abs_nabs_x16(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x01(i32 %x) {
+ %cmp = icmp sgt i32 %x, -1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x01(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x02(i32 %x) {
+ %cmp = icmp sgt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x02(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x03(i32 %x) {
+ %cmp = icmp slt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x03(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x04(i32 %x) {
+ %cmp = icmp slt i32 %x, 1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp sgt i32 %cond, -1
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x04(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x05(i32 %x) {
+ %cmp = icmp sgt i32 %x, -1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp sgt i32 %cond, 0
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x05(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x06(i32 %x) {
+ %cmp = icmp sgt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp sgt i32 %cond, 0
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x06(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x07(i32 %x) {
+ %cmp = icmp slt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp sgt i32 %cond, 0
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x07(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x08(i32 %x) {
+ %cmp = icmp slt i32 %x, 1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp sgt i32 %cond, 0
+ %sub9 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x08(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x09(i32 %x) {
+ %cmp = icmp sgt i32 %x, -1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp slt i32 %cond, 0
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x09(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x10(i32 %x) {
+ %cmp = icmp sgt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp slt i32 %cond, 0
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x10(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x11(i32 %x) {
+ %cmp = icmp slt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp slt i32 %cond, 0
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x11(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x12(i32 %x) {
+ %cmp = icmp slt i32 %x, 1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp slt i32 %cond, 0
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x12(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x13(i32 %x) {
+ %cmp = icmp sgt i32 %x, -1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp slt i32 %cond, 1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x13(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x14(i32 %x) {
+ %cmp = icmp sgt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %x, i32 %sub
+ %cmp1 = icmp slt i32 %cond, 1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x14(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x15(i32 %x) {
+ %cmp = icmp slt i32 %x, 0
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp slt i32 %cond, 1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x15(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
+
+define i32 @nabs_abs_x16(i32 %x) {
+ %cmp = icmp slt i32 %x, 1
+ %sub = sub nsw i32 0, %x
+ %cond = select i1 %cmp, i32 %sub, i32 %x
+ %cmp1 = icmp slt i32 %cond, 1
+ %sub16 = sub nsw i32 0, %cond
+ %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
+ ret i32 %cond18
+; CHECK-LABEL: @nabs_abs_x16(
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
+; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
+; CHECK-NEXT: ret i32 [[SEL]]
+}
\ No newline at end of file
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