[llvm] r210479 - Move all of the x86 subtarget initialized variables down into the x86 subtarget
Alexander Potapenko
glider at google.com
Tue Jun 10 01:12:11 PDT 2014
Great, thank you.
On Tue, Jun 10, 2014 at 12:11 PM, Eric Christopher <echristo at gmail.com> wrote:
> Ah, thanks!
>
> Fixed in r210516
>
> -eric
>
> On Tue, Jun 10, 2014 at 1:00 AM, Alexander Potapenko <glider at google.com> wrote:
>> Eric,
>>
>> Looks like you're forgetting to free JITInfo in ~X86Subtarget().
>>
>> On Mon, Jun 9, 2014 at 9:08 PM, Eric Christopher <echristo at gmail.com> wrote:
>>> Author: echristo
>>> Date: Mon Jun 9 12:08:19 2014
>>> New Revision: 210479
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=210479&view=rev
>>> Log:
>>> Move all of the x86 subtarget initialized variables down into the x86 subtarget
>>> from the x86 target machine. Should be no functional change.
>>>
>>> Modified:
>>> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>>> llvm/trunk/lib/Target/X86/X86ISelLowering.h
>>> llvm/trunk/lib/Target/X86/X86JITInfo.h
>>> llvm/trunk/lib/Target/X86/X86Subtarget.cpp
>>> llvm/trunk/lib/Target/X86/X86Subtarget.h
>>> llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
>>> llvm/trunk/lib/Target/X86/X86TargetMachine.h
>>>
>>> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=210479&r1=210478&r2=210479&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
>>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jun 9 12:08:19 2014
>>> @@ -21606,3 +21606,7 @@ int X86TargetLowering::getScalingFactorC
>>> return AM.Scale != 0;
>>> return -1;
>>> }
>>> +
>>> +bool X86TargetLowering::isTargetFTOL() const {
>>> + return Subtarget->isTargetKnownWindowsMSVC() && !Subtarget->is64Bit();
>>> +}
>>>
>>> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=210479&r1=210478&r2=210479&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
>>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Mon Jun 9 12:08:19 2014
>>> @@ -15,13 +15,13 @@
>>> #ifndef X86ISELLOWERING_H
>>> #define X86ISELLOWERING_H
>>>
>>> -#include "X86Subtarget.h"
>>> #include "llvm/CodeGen/CallingConvLower.h"
>>> #include "llvm/CodeGen/SelectionDAG.h"
>>> #include "llvm/Target/TargetLowering.h"
>>> #include "llvm/Target/TargetOptions.h"
>>>
>>> namespace llvm {
>>> + class X86Subtarget;
>>> class X86TargetMachine;
>>>
>>> namespace X86ISD {
>>> @@ -766,9 +766,7 @@ namespace llvm {
>>>
>>> /// isTargetFTOL - Return true if the target uses the MSVC _ftol2 routine
>>> /// for fptoui.
>>> - bool isTargetFTOL() const {
>>> - return Subtarget->isTargetKnownWindowsMSVC() && !Subtarget->is64Bit();
>>> - }
>>> + bool isTargetFTOL() const;
>>>
>>> /// isIntegerTypeFTOL - Return true if the MSVC _ftol2 routine should be
>>> /// used for fptoui to the given type.
>>>
>>> Modified: llvm/trunk/lib/Target/X86/X86JITInfo.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86JITInfo.h?rev=210479&r1=210478&r2=210479&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/X86JITInfo.h (original)
>>> +++ llvm/trunk/lib/Target/X86/X86JITInfo.h Mon Jun 9 12:08:19 2014
>>> @@ -23,7 +23,7 @@ namespace llvm {
>>>
>>> class X86JITInfo : public TargetJITInfo {
>>> uintptr_t PICBase;
>>> - char* TLSOffset;
>>> + char *TLSOffset;
>>> bool useSSE;
>>> public:
>>> explicit X86JITInfo(bool UseSSE);
>>>
>>> Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=210479&r1=210478&r2=210479&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
>>> +++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Mon Jun 9 12:08:19 2014
>>> @@ -297,8 +297,47 @@ void X86Subtarget::initializeEnvironment
>>> MaxInlineSizeThreshold = 128;
>>> }
>>>
>>> +static std::string computeDataLayout(const X86Subtarget &ST) {
>>> + // X86 is little endian
>>> + std::string Ret = "e";
>>> +
>>> + Ret += DataLayout::getManglingComponent(ST.getTargetTriple());
>>> + // X86 and x32 have 32 bit pointers.
>>> + if (ST.isTarget64BitILP32() || !ST.is64Bit())
>>> + Ret += "-p:32:32";
>>> +
>>> + // Some ABIs align 64 bit integers and doubles to 64 bits, others to 32.
>>> + if (ST.is64Bit() || ST.isOSWindows() || ST.isTargetNaCl())
>>> + Ret += "-i64:64";
>>> + else
>>> + Ret += "-f64:32:64";
>>> +
>>> + // Some ABIs align long double to 128 bits, others to 32.
>>> + if (ST.isTargetNaCl())
>>> + ; // No f80
>>> + else if (ST.is64Bit() || ST.isTargetDarwin())
>>> + Ret += "-f80:128";
>>> + else
>>> + Ret += "-f80:32";
>>> +
>>> + // The registers can hold 8, 16, 32 or, in x86-64, 64 bits.
>>> + if (ST.is64Bit())
>>> + Ret += "-n8:16:32:64";
>>> + else
>>> + Ret += "-n8:16:32";
>>> +
>>> + // The stack is aligned to 32 bits on some ABIs and 128 bits on others.
>>> + if (!ST.is64Bit() && ST.isOSWindows())
>>> + Ret += "-S32";
>>> + else
>>> + Ret += "-S128";
>>> +
>>> + return Ret;
>>> +}
>>> +
>>> X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
>>> - const std::string &FS, unsigned StackAlignOverride)
>>> + const std::string &FS, X86TargetMachine &TM,
>>> + unsigned StackAlignOverride)
>>> : X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others),
>>> PICStyle(PICStyles::None), TargetTriple(TT),
>>> StackAlignOverride(StackAlignOverride),
>>> @@ -306,9 +345,24 @@ X86Subtarget::X86Subtarget(const std::st
>>> In32BitMode(TargetTriple.getArch() == Triple::x86 &&
>>> TargetTriple.getEnvironment() != Triple::CODE16),
>>> In16BitMode(TargetTriple.getArch() == Triple::x86 &&
>>> - TargetTriple.getEnvironment() == Triple::CODE16) {
>>> + TargetTriple.getEnvironment() == Triple::CODE16),
>>> + DL(computeDataLayout(*this)), TSInfo(DL) {
>>> initializeEnvironment();
>>> resetSubtargetFeatures(CPU, FS);
>>> + // Ordering here is important. X86InstrInfo initializes X86RegisterInfo which
>>> + // X86TargetLowering needs.
>>> + InstrInfo = new X86InstrInfo(TM);
>>> + TLInfo = new X86TargetLowering(TM);
>>> + FrameLowering = new X86FrameLowering(TargetFrameLowering::StackGrowsDown,
>>> + getStackAlignment(),
>>> + is64Bit() ? -8 : -4);
>>> + JITInfo = new X86JITInfo(hasSSE1());
>>> +}
>>> +
>>> +X86Subtarget::~X86Subtarget() {
>>> + delete TLInfo;
>>> + delete InstrInfo;
>>> + delete FrameLowering;
>>> }
>>>
>>> bool
>>>
>>> Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=210479&r1=210478&r2=210479&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
>>> +++ llvm/trunk/lib/Target/X86/X86Subtarget.h Mon Jun 9 12:08:19 2014
>>> @@ -14,6 +14,11 @@
>>> #ifndef X86SUBTARGET_H
>>> #define X86SUBTARGET_H
>>>
>>> +#include "X86FrameLowering.h"
>>> +#include "X86ISelLowering.h"
>>> +#include "X86InstrInfo.h"
>>> +#include "X86JITInfo.h"
>>> +#include "X86SelectionDAGInfo.h"
>>> #include "llvm/ADT/Triple.h"
>>> #include "llvm/IR/CallingConv.h"
>>> #include "llvm/Target/TargetSubtargetInfo.h"
>>> @@ -40,6 +45,7 @@ enum Style {
>>> }
>>>
>>> class X86Subtarget final : public X86GenSubtargetInfo {
>>> +
>>> protected:
>>> enum X86SSEEnum {
>>> NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F
>>> @@ -220,13 +226,29 @@ private:
>>> /// In16BitMode - True if compiling for 16-bit, false for 32-bit or 64-bit.
>>> bool In16BitMode;
>>>
>>> + // Calculates type size & alignment
>>> + const DataLayout DL;
>>> + X86SelectionDAGInfo TSInfo;
>>> + X86TargetLowering *TLInfo;
>>> + X86InstrInfo *InstrInfo;
>>> + X86FrameLowering *FrameLowering;
>>> + X86JITInfo *JITInfo;
>>> +
>>> public:
>>> /// This constructor initializes the data members to match that
>>> /// of the specified triple.
>>> ///
>>> X86Subtarget(const std::string &TT, const std::string &CPU,
>>> - const std::string &FS,
>>> + const std::string &FS, X86TargetMachine &TM,
>>> unsigned StackAlignOverride);
>>> + ~X86Subtarget();
>>> +
>>> + const X86TargetLowering *getTargetLowering() const { return TLInfo; }
>>> + const X86InstrInfo *getInstrInfo() const { return InstrInfo; }
>>> + const DataLayout *getDataLayout() const { return &DL; }
>>> + const X86FrameLowering *getFrameLowering() const { return FrameLowering; }
>>> + const X86SelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
>>> + X86JITInfo *getJITInfo() { return JITInfo; }
>>>
>>> /// getStackAlignment - Returns the minimum alignment known to hold of the
>>> /// stack frame on entry to the function and which must be maintained by every
>>>
>>> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=210479&r1=210478&r2=210479&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
>>> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Mon Jun 9 12:08:19 2014
>>> @@ -29,44 +29,6 @@ extern "C" void LLVMInitializeX86Target(
>>>
>>> void X86TargetMachine::anchor() { }
>>>
>>> -static std::string computeDataLayout(const X86Subtarget &ST) {
>>> - // X86 is little endian
>>> - std::string Ret = "e";
>>> -
>>> - Ret += DataLayout::getManglingComponent(ST.getTargetTriple());
>>> - // X86 and x32 have 32 bit pointers.
>>> - if (ST.isTarget64BitILP32() || !ST.is64Bit())
>>> - Ret += "-p:32:32";
>>> -
>>> - // Some ABIs align 64 bit integers and doubles to 64 bits, others to 32.
>>> - if (ST.is64Bit() || ST.isOSWindows() || ST.isTargetNaCl())
>>> - Ret += "-i64:64";
>>> - else
>>> - Ret += "-f64:32:64";
>>> -
>>> - // Some ABIs align long double to 128 bits, others to 32.
>>> - if (ST.isTargetNaCl())
>>> - ; // No f80
>>> - else if (ST.is64Bit() || ST.isTargetDarwin())
>>> - Ret += "-f80:128";
>>> - else
>>> - Ret += "-f80:32";
>>> -
>>> - // The registers can hold 8, 16, 32 or, in x86-64, 64 bits.
>>> - if (ST.is64Bit())
>>> - Ret += "-n8:16:32:64";
>>> - else
>>> - Ret += "-n8:16:32";
>>> -
>>> - // The stack is aligned to 32 bits on some ABIs and 128 bits on others.
>>> - if (!ST.is64Bit() && ST.isOSWindows())
>>> - Ret += "-S32";
>>> - else
>>> - Ret += "-S128";
>>> -
>>> - return Ret;
>>> -}
>>> -
>>> /// X86TargetMachine ctor - Create an X86 target.
>>> ///
>>> X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT, StringRef CPU,
>>> @@ -74,12 +36,7 @@ X86TargetMachine::X86TargetMachine(const
>>> Reloc::Model RM, CodeModel::Model CM,
>>> CodeGenOpt::Level OL)
>>> : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
>>> - Subtarget(TT, CPU, FS, Options.StackAlignmentOverride),
>>> - FrameLowering(TargetFrameLowering::StackGrowsDown,
>>> - Subtarget.getStackAlignment(),
>>> - Subtarget.is64Bit() ? -8 : -4),
>>> - DL(computeDataLayout(*getSubtargetImpl())), InstrInfo(*this),
>>> - TLInfo(*this), TSInfo(DL), JITInfo(Subtarget.hasSSE1()) {
>>> + Subtarget(TT, CPU, FS, *this, Options.StackAlignmentOverride) {
>>> // Determine the PICStyle based on the target selected.
>>> if (getRelocationModel() == Reloc::Static) {
>>> // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
>>>
>>> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=210479&r1=210478&r2=210479&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original)
>>> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Mon Jun 9 12:08:19 2014
>>> @@ -18,7 +18,6 @@
>>> #include "X86ISelLowering.h"
>>> #include "X86InstrInfo.h"
>>> #include "X86JITInfo.h"
>>> -#include "X86SelectionDAGInfo.h"
>>> #include "X86Subtarget.h"
>>> #include "llvm/IR/DataLayout.h"
>>> #include "llvm/Target/TargetMachine.h"
>>> @@ -30,12 +29,6 @@ class StringRef;
>>> class X86TargetMachine final : public LLVMTargetMachine {
>>> virtual void anchor();
>>> X86Subtarget Subtarget;
>>> - X86FrameLowering FrameLowering;
>>> - const DataLayout DL; // Calculates type size & alignment
>>> - X86InstrInfo InstrInfo;
>>> - X86TargetLowering TLInfo;
>>> - X86SelectionDAGInfo TSInfo;
>>> - X86JITInfo JITInfo;
>>>
>>> public:
>>> X86TargetMachine(const Target &T, StringRef TT,
>>> @@ -43,22 +36,22 @@ public:
>>> Reloc::Model RM, CodeModel::Model CM,
>>> CodeGenOpt::Level OL);
>>>
>>> - const DataLayout *getDataLayout() const override { return &DL; }
>>> + const DataLayout *getDataLayout() const override {
>>> + return getSubtargetImpl()->getDataLayout();
>>> + }
>>> const X86InstrInfo *getInstrInfo() const override {
>>> - return &InstrInfo;
>>> + return getSubtargetImpl()->getInstrInfo();
>>> }
>>> const TargetFrameLowering *getFrameLowering() const override {
>>> - return &FrameLowering;
>>> - }
>>> - X86JITInfo *getJITInfo() override {
>>> - return &JITInfo;
>>> + return getSubtargetImpl()->getFrameLowering();
>>> }
>>> + X86JITInfo *getJITInfo() override { return Subtarget.getJITInfo(); }
>>> const X86Subtarget *getSubtargetImpl() const override { return &Subtarget; }
>>> const X86TargetLowering *getTargetLowering() const override {
>>> - return &TLInfo;
>>> + return getSubtargetImpl()->getTargetLowering();
>>> }
>>> const X86SelectionDAGInfo *getSelectionDAGInfo() const override {
>>> - return &TSInfo;
>>> + return getSubtargetImpl()->getSelectionDAGInfo();
>>> }
>>> const X86RegisterInfo *getRegisterInfo() const override {
>>> return &getInstrInfo()->getRegisterInfo();
>>>
>>>
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>>
>>
>>
>> --
>> Alexander Potapenko
>> Software Engineer
>> Google Moscow
--
Alexander Potapenko
Software Engineer
Google Moscow
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