[test-suite] r210277 - [PATCH, test-suite] Add some Altivec execution tests
Bill Schmidt
wschmidt at linux.vnet.ibm.com
Thu Jun 5 11:12:54 PDT 2014
Author: wschmidt
Date: Thu Jun 5 13:12:53 2014
New Revision: 210277
URL: http://llvm.org/viewvc/llvm-project?rev=210277&view=rev
Log:
[PATCH, test-suite] Add some Altivec execution tests
The PowerPC VMX instruction set (also known as Altivec) contains a
number of instructions that have a "big-endian bias"; that is, they
implicitly or explicitly assume that vector elements are numbered
"left to right" within a vector register. These instructions
therefore do not behave naturally when code is generated for a little
endian target.
These, as well as the better-behaved Altivec instructions, may be
accessed through interfaces defined in <altivec.h>. For ease of
porting, it is desirable that the Altivec instructions behave as a
programmer would expect for little endian code generation, rather than
how the underlying instructions actually work.
As an example, the vec_mule interface is used to perform a widening
multiply on even elements of a vector. The even elements, when
numbered in little-endian element order, are the same as the odd
elements when numbered in big-endian element order. Therefore when
vec_mule is specified in a program, the proper effect is obtained by
generating a vector-multiply-even for a big-endian target, but instead
generating a vector-multiply-odd for a little-endian target.
I will be submitting a number of patches to implement these changes
for little-endian code generation. For the present, I want to add a
number of new test cases that will test the correct behavior of the
endian-sensitive Altivec instructions for both big- and little-endian
targets.
The new tests in this patch are self-testing; they will abort if the
instructions produce a wrong result. It seemed to me the best place
to put these tests was with the other run-time Altivec tests, i.e., in
projects/test-suite/SingleSource/UnitTests/Vector/Altivec. In keeping
with the behavior of the existing tests, I've included reference
output files for each test; however, these are minimal ("exit 0\n")
because of the self-testing nature of the tests. Please let me know
if there is a better place to put these tests, or any additional
materials I need to provide.
All of these tests currently run correctly on big-endian PPC64
targets, with the exception of unpack.c. This is because the current
implementations of vec_unpackh and vec_unpackl with a vector pixel
argument do not generate correct code. This will be fixed in a
follow-on patch that addresses the little endian implementations of
vec_unpack[hl].
Added:
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/extract.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/extract.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/harness.h
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/insert.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/insert.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ld.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ld.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/lde.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/lde.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ldl.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ldl.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/merge.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/merge.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/mult-even-odd.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/mult-even-odd.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/pack.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/pack.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/perm.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/perm.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/splat.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/splat.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/st.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/st.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ste.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ste.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/stl.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/stl.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sum2s.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sum2s.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sums.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sums.reference_output
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/unpack.c
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/unpack.reference_output
Modified:
test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/Makefile
Modified: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/Makefile
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/Makefile?rev=210277&r1=210276&r2=210277&view=diff
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/Makefile (original)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/Makefile Thu Jun 5 13:12:53 2014
@@ -16,7 +16,9 @@ LCCFLAGS += -maltivec
ifdef BENCHMARKING_ONLY
PROGRAMS_TO_SKIP += \
2007-01-07-lvsl-lvsr-Regression alti.sdot \
- casts test1
+ casts test1 \
+ extract insert ld lde ldl merge mult-even-odd \
+ pack perm splat st ste stl sum2s sums unpack
endif
include $(LEVEL)/SingleSource/Makefile.singlesrc
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/extract.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/extract.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/extract.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/extract.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,21 @@
+#include "harness.h"
+
+static void test()
+{
+ vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector unsigned short vc = {0,1,2,3,4,5,6,7};
+ vector signed short vd = {-4,-3,-2,-1,0,1,2,3};
+ vector unsigned int ve = {0,1,2,3};
+ vector signed int vf = {-2,-1,0,1};
+ vector float vg = {-2.0f,-1.0f,0.0f,1.0f};
+
+ check (vec_extract (va, 5) == 5, "vec_extract (va, 5)");
+ check (vec_extract (vb, 0) == -8, "vec_extract (vb, 0)");
+ check (vec_extract (vc, 7) == 7, "vec_extract (vc, 7)");
+ check (vec_extract (vd, 3) == -1, "vec_extract (vd, 3)");
+ check (vec_extract (ve, 2) == 2, "vec_extract (ve, 2)");
+ check (vec_extract (vf, 1) == -1, "vec_extract (vf, 1)");
+ check (vec_extract (vg, 0) == -2.0f, "vec_extract (vg, 0)");
+}
+
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/extract.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/extract.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/extract.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/extract.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/harness.h
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/harness.h?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/harness.h (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/harness.h Thu Jun 5 13:12:53 2014
@@ -0,0 +1,30 @@
+/* Common code for most VMX test cases. To use, include this file,
+ then write a routine named test() that performs a series of calls
+ to check(). */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <altivec.h>
+
+static int failed;
+static void test (void);
+
+static void
+check (int result, const char *name)
+{
+ if (!result)
+ {
+ failed++;
+ printf ("fail %s\n", name);
+ }
+}
+
+int
+main (void)
+{
+ test ();
+ if (failed)
+ abort ();
+
+ return 0;
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/insert.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/insert.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/insert.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/insert.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,37 @@
+#include "harness.h"
+
+static void test()
+{
+ vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector unsigned short vc = {0,1,2,3,4,5,6,7};
+ vector signed short vd = {-4,-3,-2,-1,0,1,2,3};
+ vector unsigned int ve = {0,1,2,3};
+ vector signed int vf = {-2,-1,0,1};
+ vector float vg = {-2.0f,-1.0f,0.0f,1.0f};
+
+ check (vec_all_eq (vec_insert ((unsigned char)16, va, 5),
+ ((vector unsigned char)
+ {0,1,2,3,4,16,6,7,8,9,10,11,12,13,14,15})),
+ "vec_insert (va)");
+ check (vec_all_eq (vec_insert ((signed char)-16, vb, 0),
+ ((vector signed char)
+ {-16,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7})),
+ "vec_insert (vb)");
+ check (vec_all_eq (vec_insert ((unsigned short)16, vc, 7),
+ ((vector unsigned short){0,1,2,3,4,5,6,16})),
+ "vec_insert (vc)");
+ check (vec_all_eq (vec_insert ((signed short)-16, vd, 3),
+ ((vector signed short){-4,-3,-2,-16,0,1,2,3})),
+ "vec_insert (vd)");
+ check (vec_all_eq (vec_insert ((unsigned int)16, ve, 2),
+ ((vector unsigned int){0,1,16,3})),
+ "vec_insert (ve)");
+ check (vec_all_eq (vec_insert ((signed int)-16, vf, 1),
+ ((vector signed int){-2,-16,0,1})),
+ "vec_insert (vf)");
+ check (vec_all_eq (vec_insert (-16.0f, vg, 0),
+ ((vector float){-16.0f,-1.0f,0.0f,1.0f})),
+ "vec_insert (vg)");
+}
+
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/insert.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/insert.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/insert.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/insert.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ld.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ld.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ld.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ld.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,91 @@
+#include "harness.h"
+
+static unsigned char svuc[16] __attribute__ ((aligned (16)));
+static signed char svsc[16] __attribute__ ((aligned (16)));
+static unsigned char svbc[16] __attribute__ ((aligned (16)));
+static unsigned short svus[8] __attribute__ ((aligned (16)));
+static signed short svss[8] __attribute__ ((aligned (16)));
+static unsigned short svbs[8] __attribute__ ((aligned (16)));
+static unsigned short svp[8] __attribute__ ((aligned (16)));
+static unsigned int svui[4] __attribute__ ((aligned (16)));
+static signed int svsi[4] __attribute__ ((aligned (16)));
+static unsigned int svbi[4] __attribute__ ((aligned (16)));
+static float svf[4] __attribute__ ((aligned (16)));
+
+static void init ()
+{
+ unsigned int i;
+ for (i = 0; i < 16; ++i)
+ {
+ svuc[i] = i;
+ svsc[i] = i - 8;
+ svbc[i] = (i % 2) ? 0xff : 0;
+ }
+ for (i = 0; i < 8; ++i)
+ {
+ svus[i] = i;
+ svss[i] = i - 4;
+ svbs[i] = (i % 2) ? 0xffff : 0;
+ svp[i] = i;
+ }
+ for (i = 0; i < 4; ++i)
+ {
+ svui[i] = i;
+ svsi[i] = i - 2;
+ svbi[i] = (i % 2) ? 0xffffffff : 0;
+ svf[i] = i * 1.0f;
+ }
+}
+
+static void test ()
+{
+ vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};
+ vector unsigned short evus = {0,1,2,3,4,5,6,7};
+ vector signed short evss = {-4,-3,-2,-1,0,1,2,3};
+ vector bool short evbs = {0,65535,0,65535,0,65535,0,65535};
+ vector pixel evp = {0,1,2,3,4,5,6,7};
+ vector unsigned int evui = {0,1,2,3};
+ vector signed int evsi = {-2,-1,0,1};
+ vector bool int evbi = {0,0xffffffff,0,0xffffffff};
+ vector float evf = {0.0,1.0,2.0,3.0};
+
+ vector unsigned char vuc;
+ vector signed char vsc;
+ vector bool char vbc;
+ vector unsigned short vus;
+ vector signed short vss;
+ vector bool short vbs;
+ vector pixel vp;
+ vector unsigned int vui;
+ vector signed int vsi;
+ vector bool int vbi;
+ vector float vf;
+
+ init ();
+
+ vuc = vec_ld (0, (vector unsigned char *)svuc);
+ vsc = vec_ld (0, (vector signed char *)svsc);
+ vbc = vec_ld (0, (vector bool char *)svbc);
+ vus = vec_ld (0, (vector unsigned short *)svus);
+ vss = vec_ld (0, (vector signed short *)svss);
+ vbs = vec_ld (0, (vector bool short *)svbs);
+ vp = vec_ld (0, (vector pixel *)svp);
+ vui = vec_ld (0, (vector unsigned int *)svui);
+ vsi = vec_ld (0, (vector signed int *)svsi);
+ vbi = vec_ld (0, (vector bool int *)svbi);
+ vf = vec_ld (0, (vector float *)svf);
+
+ check (vec_all_eq (vuc, evuc), "vuc");
+ check (vec_all_eq (vsc, evsc), "vsc");
+ check (vec_all_eq (vbc, evbc), "vbc");
+ check (vec_all_eq (vus, evus), "vus");
+ check (vec_all_eq (vss, evss), "vss");
+ check (vec_all_eq (vbs, evbs), "vbs");
+ check (vec_all_eq (vp, evp ), "vp" );
+ check (vec_all_eq (vui, evui), "vui");
+ check (vec_all_eq (vsi, evsi), "vsi");
+ check (vec_all_eq (vbi, evbi), "vbi");
+ check (vec_all_eq (vf, evf ), "vf" );
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ld.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ld.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ld.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ld.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/lde.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/lde.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/lde.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/lde.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,59 @@
+#include "harness.h"
+
+static unsigned char svuc[16] __attribute__ ((aligned (16)));
+static signed char svsc[16] __attribute__ ((aligned (16)));
+static unsigned short svus[8] __attribute__ ((aligned (16)));
+static signed short svss[8] __attribute__ ((aligned (16)));
+static unsigned int svui[4] __attribute__ ((aligned (16)));
+static signed int svsi[4] __attribute__ ((aligned (16)));
+static float svf[4] __attribute__ ((aligned (16)));
+
+static void init ()
+{
+ unsigned int i;
+ for (i = 0; i < 16; ++i)
+ {
+ svuc[i] = i;
+ svsc[i] = i - 8;
+ }
+ for (i = 0; i < 8; ++i)
+ {
+ svus[i] = i;
+ svss[i] = i - 4;
+ }
+ for (i = 0; i < 4; ++i)
+ {
+ svui[i] = i;
+ svsi[i] = i - 2;
+ svf[i] = i * 1.0f;
+ }
+}
+
+static void test ()
+{
+ vector unsigned char vuc;
+ vector signed char vsc;
+ vector unsigned short vus;
+ vector signed short vss;
+ vector unsigned int vui;
+ vector signed int vsi;
+ vector float vf;
+
+ init ();
+
+ vuc = vec_lde (9*1, (unsigned char *)svuc);
+ vsc = vec_lde (14*1, (signed char *)svsc);
+ vus = vec_lde (7*2, (unsigned short *)svus);
+ vss = vec_lde (1*2, (signed short *)svss);
+ vui = vec_lde (3*4, (unsigned int *)svui);
+ vsi = vec_lde (2*4, (signed int *)svsi);
+ vf = vec_lde (0*4, (float *)svf);
+
+ check (vec_extract (vuc, 9) == 9, "vuc");
+ check (vec_extract (vsc, 14) == 6, "vsc");
+ check (vec_extract (vus, 7) == 7, "vus");
+ check (vec_extract (vss, 1) == -3, "vss");
+ check (vec_extract (vui, 3) == 3, "vui");
+ check (vec_extract (vsi, 2) == 0, "vsi");
+ check (vec_extract (vf, 0) == 0.0, "vf");
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/lde.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/lde.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/lde.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/lde.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ldl.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ldl.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ldl.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ldl.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,91 @@
+#include "harness.h"
+
+static unsigned char svuc[16] __attribute__ ((aligned (16)));
+static signed char svsc[16] __attribute__ ((aligned (16)));
+static unsigned char svbc[16] __attribute__ ((aligned (16)));
+static unsigned short svus[8] __attribute__ ((aligned (16)));
+static signed short svss[8] __attribute__ ((aligned (16)));
+static unsigned short svbs[8] __attribute__ ((aligned (16)));
+static unsigned short svp[8] __attribute__ ((aligned (16)));
+static unsigned int svui[4] __attribute__ ((aligned (16)));
+static signed int svsi[4] __attribute__ ((aligned (16)));
+static unsigned int svbi[4] __attribute__ ((aligned (16)));
+static float svf[4] __attribute__ ((aligned (16)));
+
+static void init ()
+{
+ unsigned int i;
+ for (i = 0; i < 16; ++i)
+ {
+ svuc[i] = i;
+ svsc[i] = i - 8;
+ svbc[i] = (i % 2) ? 0xff : 0;
+ }
+ for (i = 0; i < 8; ++i)
+ {
+ svus[i] = i;
+ svss[i] = i - 4;
+ svbs[i] = (i % 2) ? 0xffff : 0;
+ svp[i] = i;
+ }
+ for (i = 0; i < 4; ++i)
+ {
+ svui[i] = i;
+ svsi[i] = i - 2;
+ svbi[i] = (i % 2) ? 0xffffffff : 0;
+ svf[i] = i * 1.0f;
+ }
+}
+
+static void test ()
+{
+ vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};
+ vector unsigned short evus = {0,1,2,3,4,5,6,7};
+ vector signed short evss = {-4,-3,-2,-1,0,1,2,3};
+ vector bool short evbs = {0,65535,0,65535,0,65535,0,65535};
+ vector pixel evp = {0,1,2,3,4,5,6,7};
+ vector unsigned int evui = {0,1,2,3};
+ vector signed int evsi = {-2,-1,0,1};
+ vector bool int evbi = {0,0xffffffff,0,0xffffffff};
+ vector float evf = {0.0,1.0,2.0,3.0};
+
+ vector unsigned char vuc;
+ vector signed char vsc;
+ vector bool char vbc;
+ vector unsigned short vus;
+ vector signed short vss;
+ vector bool short vbs;
+ vector pixel vp;
+ vector unsigned int vui;
+ vector signed int vsi;
+ vector bool int vbi;
+ vector float vf;
+
+ init ();
+
+ vuc = vec_ldl (0, (vector unsigned char *)svuc);
+ vsc = vec_ldl (0, (vector signed char *)svsc);
+ vbc = vec_ldl (0, (vector bool char *)svbc);
+ vus = vec_ldl (0, (vector unsigned short *)svus);
+ vss = vec_ldl (0, (vector signed short *)svss);
+ vbs = vec_ldl (0, (vector bool short *)svbs);
+ vp = vec_ldl (0, (vector pixel *)svp);
+ vui = vec_ldl (0, (vector unsigned int *)svui);
+ vsi = vec_ldl (0, (vector signed int *)svsi);
+ vbi = vec_ldl (0, (vector bool int *)svbi);
+ vf = vec_ldl (0, (vector float *)svf);
+
+ check (vec_all_eq (vuc, evuc), "vuc");
+ check (vec_all_eq (vsc, evsc), "vsc");
+ check (vec_all_eq (vbc, evbc), "vbc");
+ check (vec_all_eq (vus, evus), "vus");
+ check (vec_all_eq (vss, evss), "vss");
+ check (vec_all_eq (vbs, evbs), "vbs");
+ check (vec_all_eq (vp, evp ), "vp" );
+ check (vec_all_eq (vui, evui), "vui");
+ check (vec_all_eq (vsi, evsi), "vsi");
+ check (vec_all_eq (vbi, evbi), "vbi");
+ check (vec_all_eq (vf, evf ), "vf" );
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ldl.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ldl.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ldl.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ldl.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/merge.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/merge.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/merge.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/merge.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,77 @@
+#include "harness.h"
+
+static void test()
+{
+ /* Input vectors. */
+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector unsigned char vucb
+ = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31};
+ vector signed char vsca
+ = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1};
+ vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};
+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};
+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};
+ vector signed short vssb = {0,1,2,3,4,5,6,7};
+ vector unsigned int vuia = {0,1,2,3};
+ vector unsigned int vuib = {4,5,6,7};
+ vector signed int vsia = {-4,-3,-2,-1};
+ vector signed int vsib = {0,1,2,3};
+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};
+ vector float vfb = {0.0,1.0,2.0,3.0};
+
+ /* Result vectors. */
+ vector unsigned char vuch, vucl;
+ vector signed char vsch, vscl;
+ vector unsigned short vush, vusl;
+ vector signed short vssh, vssl;
+ vector unsigned int vuih, vuil;
+ vector signed int vsih, vsil;
+ vector float vfh, vfl;
+
+ /* Expected result vectors. */
+ vector unsigned char vucrh = {0,16,1,17,2,18,3,19,4,20,5,21,6,22,7,23};
+ vector unsigned char vucrl = {8,24,9,25,10,26,11,27,12,28,13,29,14,30,15,31};
+ vector signed char vscrh = {-16,0,-15,1,-14,2,-13,3,-12,4,-11,5,-10,6,-9,7};
+ vector signed char vscrl = {-8,8,-7,9,-6,10,-5,11,-4,12,-3,13,-2,14,-1,15};
+ vector unsigned short vusrh = {0,8,1,9,2,10,3,11};
+ vector unsigned short vusrl = {4,12,5,13,6,14,7,15};
+ vector signed short vssrh = {-8,0,-7,1,-6,2,-5,3};
+ vector signed short vssrl = {-4,4,-3,5,-2,6,-1,7};
+ vector unsigned int vuirh = {0,4,1,5};
+ vector unsigned int vuirl = {2,6,3,7};
+ vector signed int vsirh = {-4,0,-3,1};
+ vector signed int vsirl = {-2,2,-1,3};
+ vector float vfrh = {-4.0,0.0,-3.0,1.0};
+ vector float vfrl = {-2.0,2.0,-1.0,3.0};
+
+ vuch = vec_mergeh (vuca, vucb);
+ vucl = vec_mergel (vuca, vucb);
+ vsch = vec_mergeh (vsca, vscb);
+ vscl = vec_mergel (vsca, vscb);
+ vush = vec_mergeh (vusa, vusb);
+ vusl = vec_mergel (vusa, vusb);
+ vssh = vec_mergeh (vssa, vssb);
+ vssl = vec_mergel (vssa, vssb);
+ vuih = vec_mergeh (vuia, vuib);
+ vuil = vec_mergel (vuia, vuib);
+ vsih = vec_mergeh (vsia, vsib);
+ vsil = vec_mergel (vsia, vsib);
+ vfh = vec_mergeh (vfa, vfb );
+ vfl = vec_mergel (vfa, vfb );
+
+ check (vec_all_eq (vuch, vucrh), "vuch");
+ check (vec_all_eq (vucl, vucrl), "vucl");
+ check (vec_all_eq (vsch, vscrh), "vsch");
+ check (vec_all_eq (vscl, vscrl), "vscl");
+ check (vec_all_eq (vush, vusrh), "vush");
+ check (vec_all_eq (vusl, vusrl), "vusl");
+ check (vec_all_eq (vssh, vssrh), "vssh");
+ check (vec_all_eq (vssl, vssrl), "vssl");
+ check (vec_all_eq (vuih, vuirh), "vuih");
+ check (vec_all_eq (vuil, vuirl), "vuil");
+ check (vec_all_eq (vsih, vsirh), "vsih");
+ check (vec_all_eq (vsil, vsirl), "vsil");
+ check (vec_all_eq (vfh, vfrh), "vfh");
+ check (vec_all_eq (vfl, vfrl), "vfl");
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/merge.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/merge.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/merge.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/merge.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/mult-even-odd.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/mult-even-odd.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/mult-even-odd.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/mult-even-odd.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,43 @@
+#include "harness.h"
+
+static void test()
+{
+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector unsigned char vucb = {2,3,2,3,2,3,2,3,2,3,2,3,2,3,2,3};
+ vector signed char vsca = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector signed char vscb = {2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3};
+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};
+ vector unsigned short vusb = {2,3,2,3,2,3,2,3};
+ vector signed short vssa = {-4,-3,-2,-1,0,1,2,3};
+ vector signed short vssb = {2,-3,2,-3,2,-3,2,-3};
+ vector unsigned short vuse, vuso;
+ vector signed short vsse, vsso;
+ vector unsigned int vuie, vuio;
+ vector signed int vsie, vsio;
+
+ vuse = vec_mule (vuca, vucb);
+ vuso = vec_mulo (vuca, vucb);
+ vsse = vec_mule (vsca, vscb);
+ vsso = vec_mulo (vsca, vscb);
+ vuie = vec_mule (vusa, vusb);
+ vuio = vec_mulo (vusa, vusb);
+ vsie = vec_mule (vssa, vssb);
+ vsio = vec_mulo (vssa, vssb);
+
+ check (vec_all_eq (vuse,
+ ((vector unsigned short){0,4,8,12,16,20,24,28})),
+ "vuse");
+ check (vec_all_eq (vuso,
+ ((vector unsigned short){3,9,15,21,27,33,39,45})),
+ "vuso");
+ check (vec_all_eq (vsse,
+ ((vector signed short){-16,-12,-8,-4,0,4,8,12})),
+ "vsse");
+ check (vec_all_eq (vsso,
+ ((vector signed short){21,15,9,3,-3,-9,-15,-21})),
+ "vsso");
+ check (vec_all_eq (vuie, ((vector unsigned int){0,4,8,12})), "vuie");
+ check (vec_all_eq (vuio, ((vector unsigned int){3,9,15,21})), "vuio");
+ check (vec_all_eq (vsie, ((vector signed int){-8,-4,0,4})), "vsie");
+ check (vec_all_eq (vsio, ((vector signed int){9,3,-3,-9})), "vsio");
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/mult-even-odd.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/mult-even-odd.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/mult-even-odd.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/mult-even-odd.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/pack.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/pack.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/pack.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/pack.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,108 @@
+#include "harness.h"
+
+#define BIG 4294967295
+
+static void test()
+{
+ /* Input vectors. */
+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};
+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};
+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};
+ vector signed short vssb = {0,1,2,3,4,5,6,7};
+ vector bool short vbsa = {0,65535,65535,0,0,0,65535,0};
+ vector bool short vbsb = {65535,0,0,65535,65535,65535,0,65535};
+ vector unsigned int vuia = {0,1,2,3};
+ vector unsigned int vuib = {4,5,6,7};
+ vector signed int vsia = {-4,-3,-2,-1};
+ vector signed int vsib = {0,1,2,3};
+ vector bool int vbia = {0,BIG,BIG,BIG};
+ vector bool int vbib = {BIG,0,0,0};
+ vector unsigned int vipa = {(0<<24) + (2<<19) + (3<<11) + (4<<3),
+ (1<<24) + (5<<19) + (6<<11) + (7<<3),
+ (0<<24) + (8<<19) + (9<<11) + (10<<3),
+ (1<<24) + (11<<19) + (12<<11) + (13<<3)};
+ vector unsigned int vipb = {(1<<24) + (14<<19) + (15<<11) + (16<<3),
+ (0<<24) + (17<<19) + (18<<11) + (19<<3),
+ (1<<24) + (20<<19) + (21<<11) + (22<<3),
+ (0<<24) + (23<<19) + (24<<11) + (25<<3)};
+ vector unsigned short vusc = {0,256,1,257,2,258,3,259};
+ vector unsigned short vusd = {4,260,5,261,6,262,7,263};
+ vector signed short vssc = {-1,-128,0,127,-2,-129,1,128};
+ vector signed short vssd = {-3,-130,2,129,-4,-131,3,130};
+ vector unsigned int vuic = {0,65536,1,65537};
+ vector unsigned int vuid = {2,65538,3,65539};
+ vector signed int vsic = {-1,-32768,0,32767};
+ vector signed int vsid = {-2,-32769,1,32768};
+
+ /* Result vectors. */
+ vector unsigned char vucr;
+ vector signed char vscr;
+ vector bool char vbcr;
+ vector unsigned short vusr;
+ vector signed short vssr;
+ vector bool short vbsr;
+ vector pixel vpr;
+ vector unsigned char vucsr;
+ vector signed char vscsr;
+ vector unsigned short vussr;
+ vector signed short vsssr;
+ vector unsigned char vucsur1, vucsur2;
+ vector unsigned short vussur1, vussur2;
+
+ /* Expected result vectors. */
+ vector unsigned char vucer = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector signed char vscer = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector bool char vbcer = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};
+ vector unsigned short vuser = {0,1,2,3,4,5,6,7};
+ vector signed short vsser = {-4,-3,-2,-1,0,1,2,3};
+ vector bool short vbser = {0,65535,65535,65535,65535,0,0,0};
+ vector pixel vper = {(0<<15) + (2<<10) + (3<<5) + 4,
+ (1<<15) + (5<<10) + (6<<5) + 7,
+ (0<<15) + (8<<10) + (9<<5) + 10,
+ (1<<15) + (11<<10) + (12<<5) + 13,
+ (1<<15) + (14<<10) + (15<<5) + 16,
+ (0<<15) + (17<<10) + (18<<5) + 19,
+ (1<<15) + (20<<10) + (21<<5) + 22,
+ (0<<15) + (23<<10) + (24<<5) + 25};
+ vector unsigned char vucser = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};
+ vector signed char vscser = {-1,-128,0,127,-2,-128,1,127,
+ -3,-128,2,127,-4,-128,3,127};
+ vector unsigned short vusser = {0,65535,1,65535,2,65535,3,65535};
+ vector signed short vssser = {-1,-32768,0,32767,-2,-32768,1,32767};
+ vector unsigned char vucsuer1 = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255};
+ vector unsigned char vucsuer2 = {0,0,0,127,0,0,1,128,0,0,2,129,0,0,3,130};
+ vector unsigned short vussuer1 = {0,65535,1,65535,2,65535,3,65535};
+ vector unsigned short vussuer2 = {0,0,0,32767,0,0,1,32768};
+
+ vucr = vec_pack (vusa, vusb);
+ vscr = vec_pack (vssa, vssb);
+ vbcr = vec_pack (vbsa, vbsb);
+ vusr = vec_pack (vuia, vuib);
+ vssr = vec_pack (vsia, vsib);
+ vbsr = vec_pack (vbia, vbib);
+ vpr = vec_packpx (vipa, vipb);
+ vucsr = vec_packs (vusc, vusd);
+ vscsr = vec_packs (vssc, vssd);
+ vussr = vec_packs (vuic, vuid);
+ vsssr = vec_packs (vsic, vsid);
+ vucsur1 = vec_packsu (vusc, vusd);
+ vucsur2 = vec_packsu (vssc, vssd);
+ vussur1 = vec_packsu (vuic, vuid);
+ vussur2 = vec_packsu (vsic, vsid);
+
+ check (vec_all_eq (vucr, vucer), "vucr");
+ check (vec_all_eq (vscr, vscer), "vscr");
+ check (vec_all_eq (vbcr, vbcer), "vbcr");
+ check (vec_all_eq (vusr, vuser), "vusr");
+ check (vec_all_eq (vssr, vsser), "vssr");
+ check (vec_all_eq (vbsr, vbser), "vbsr");
+ check (vec_all_eq (vpr, vper ), "vpr" );
+ check (vec_all_eq (vucsr, vucser), "vucsr");
+ check (vec_all_eq (vscsr, vscser), "vscsr");
+ check (vec_all_eq (vussr, vusser), "vussr");
+ check (vec_all_eq (vsssr, vssser), "vsssr");
+ check (vec_all_eq (vucsur1, vucsuer1), "vucsur1");
+ check (vec_all_eq (vucsur2, vucsuer2), "vucsur2");
+ check (vec_all_eq (vussur1, vussuer1), "vussur1");
+ check (vec_all_eq (vussur2, vussuer2), "vussur2");
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/pack.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/pack.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/pack.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/pack.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/perm.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/perm.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/perm.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/perm.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,69 @@
+#include "harness.h"
+
+static void test()
+{
+ /* Input vectors. */
+ vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector unsigned char vucb
+ = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31};
+ vector unsigned char vucp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};
+
+ vector signed char vsca
+ = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1};
+ vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector unsigned char vscp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};
+
+ vector unsigned short vusa = {0,1,2,3,4,5,6,7};
+ vector unsigned short vusb = {8,9,10,11,12,13,14,15};
+ vector unsigned char vusp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};
+
+ vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1};
+ vector signed short vssb = {0,1,2,3,4,5,6,7};
+ vector unsigned char vssp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25};
+
+ vector unsigned int vuia = {0,1,2,3};
+ vector unsigned int vuib = {4,5,6,7};
+ vector unsigned char vuip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};
+
+ vector signed int vsia = {-4,-3,-2,-1};
+ vector signed int vsib = {0,1,2,3};
+ vector unsigned char vsip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};
+
+ vector float vfa = {-4.0,-3.0,-2.0,-1.0};
+ vector float vfb = {0.0,1.0,2.0,3.0};
+ vector unsigned char vfp = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27};
+
+ /* Result vectors. */
+ vector unsigned char vuc;
+ vector signed char vsc;
+ vector unsigned short vus;
+ vector signed short vss;
+ vector unsigned int vui;
+ vector signed int vsi;
+ vector float vf;
+
+ /* Expected result vectors. */
+ vector unsigned char vucr = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24};
+ vector signed char vscr = {-16,15,-15,14,-14,13,-13,12,-12,11,-11,10,-10,9,-9,8};
+ vector unsigned short vusr = {0,15,1,14,2,13,3,12};
+ vector signed short vssr = {-8,7,-7,6,-6,5,-5,4};
+ vector unsigned int vuir = {0,7,1,6};
+ vector signed int vsir = {-4,3,-3,2};
+ vector float vfr = {-4.0,3.0,-3.0,2.0};
+
+ vuc = vec_perm (vuca, vucb, vucp);
+ vsc = vec_perm (vsca, vscb, vscp);
+ vus = vec_perm (vusa, vusb, vusp);
+ vss = vec_perm (vssa, vssb, vssp);
+ vui = vec_perm (vuia, vuib, vuip);
+ vsi = vec_perm (vsia, vsib, vsip);
+ vf = vec_perm (vfa, vfb, vfp );
+
+ check (vec_all_eq (vuc, vucr), "vuc");
+ check (vec_all_eq (vsc, vscr), "vsc");
+ check (vec_all_eq (vus, vusr), "vus");
+ check (vec_all_eq (vss, vssr), "vss");
+ check (vec_all_eq (vui, vuir), "vui");
+ check (vec_all_eq (vsi, vsir), "vsi");
+ check (vec_all_eq (vf, vfr), "vf" );
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/perm.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/perm.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/perm.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/perm.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/splat.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/splat.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/splat.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/splat.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,47 @@
+#include "harness.h"
+
+static void test()
+{
+ /* Input vectors. */
+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector unsigned short vus = {0,1,2,3,4,5,6,7};
+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};
+ vector unsigned int vui = {0,1,2,3};
+ vector signed int vsi = {-2,-1,0,1};
+ vector float vf = {-2.0,-1.0,0.0,1.0};
+
+ /* Result vectors. */
+ vector unsigned char vucr;
+ vector signed char vscr;
+ vector unsigned short vusr;
+ vector signed short vssr;
+ vector unsigned int vuir;
+ vector signed int vsir;
+ vector float vfr;
+
+ /* Expected result vectors. */
+ vector unsigned char vucer = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1};
+ vector signed char vscer = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
+ vector unsigned short vuser = {7,7,7,7,7,7,7,7};
+ vector signed short vsser = {-4,-4,-4,-4,-4,-4,-4,-4};
+ vector unsigned int vuier = {2,2,2,2};
+ vector signed int vsier = {1,1,1,1};
+ vector float vfer = {-1.0,-1.0,-1.0,-1.0};
+
+ vucr = vec_splat (vuc, 1);
+ vscr = vec_splat (vsc, 8);
+ vusr = vec_splat (vus, 7);
+ vssr = vec_splat (vss, 0);
+ vuir = vec_splat (vui, 2);
+ vsir = vec_splat (vsi, 3);
+ vfr = vec_splat (vf, 1);
+
+ check (vec_all_eq (vucr, vucer), "vuc");
+ check (vec_all_eq (vscr, vscer), "vsc");
+ check (vec_all_eq (vusr, vuser), "vus");
+ check (vec_all_eq (vssr, vsser), "vss");
+ check (vec_all_eq (vuir, vuier), "vui");
+ check (vec_all_eq (vsir, vsier), "vsi");
+ check (vec_all_eq (vfr, vfer ), "vf");
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/splat.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/splat.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/splat.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/splat.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/st.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/st.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/st.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/st.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,67 @@
+#include "harness.h"
+
+static unsigned char svuc[16] __attribute__ ((aligned (16)));
+static signed char svsc[16] __attribute__ ((aligned (16)));
+static unsigned char svbc[16] __attribute__ ((aligned (16)));
+static unsigned short svus[8] __attribute__ ((aligned (16)));
+static signed short svss[8] __attribute__ ((aligned (16)));
+static unsigned short svbs[8] __attribute__ ((aligned (16)));
+static unsigned short svp[8] __attribute__ ((aligned (16)));
+static unsigned int svui[4] __attribute__ ((aligned (16)));
+static signed int svsi[4] __attribute__ ((aligned (16)));
+static unsigned int svbi[4] __attribute__ ((aligned (16)));
+static float svf[4] __attribute__ ((aligned (16)));
+
+static void check_arrays ()
+{
+ unsigned int i;
+ for (i = 0; i < 16; ++i)
+ {
+ check (svuc[i] == i, "svuc");
+ check (svsc[i] == i - 8, "svsc");
+ check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc");
+ }
+ for (i = 0; i < 8; ++i)
+ {
+ check (svus[i] == i, "svus");
+ check (svss[i] == i - 4, "svss");
+ check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs");
+ check (svp[i] == i, "svp");
+ }
+ for (i = 0; i < 4; ++i)
+ {
+ check (svui[i] == i, "svui");
+ check (svsi[i] == i - 2, "svsi");
+ check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi");
+ check (svf[i] == i * 1.0f, "svf");
+ }
+}
+
+static void test ()
+{
+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};
+ vector unsigned short vus = {0,1,2,3,4,5,6,7};
+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};
+ vector bool short vbs = {0,65535,0,65535,0,65535,0,65535};
+ vector pixel vp = {0,1,2,3,4,5,6,7};
+ vector unsigned int vui = {0,1,2,3};
+ vector signed int vsi = {-2,-1,0,1};
+ vector bool int vbi = {0,0xffffffff,0,0xffffffff};
+ vector float vf = {0.0,1.0,2.0,3.0};
+
+ vec_st (vuc, 0, (vector unsigned char *)svuc);
+ vec_st (vsc, 0, (vector signed char *)svsc);
+ vec_st (vbc, 0, (vector bool char *)svbc);
+ vec_st (vus, 0, (vector unsigned short *)svus);
+ vec_st (vss, 0, (vector signed short *)svss);
+ vec_st (vbs, 0, (vector bool short *)svbs);
+ vec_st (vp, 0, (vector pixel *)svp);
+ vec_st (vui, 0, (vector unsigned int *)svui);
+ vec_st (vsi, 0, (vector signed int *)svsi);
+ vec_st (vbi, 0, (vector bool int *)svbi);
+ vec_st (vf, 0, (vector float *)svf);
+
+ check_arrays ();
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/st.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/st.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/st.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/st.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ste.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ste.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ste.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ste.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,41 @@
+#include "harness.h"
+
+static unsigned char svuc[16] __attribute__ ((aligned (16)));
+static signed char svsc[16] __attribute__ ((aligned (16)));
+static unsigned short svus[8] __attribute__ ((aligned (16)));
+static signed short svss[8] __attribute__ ((aligned (16)));
+static unsigned int svui[4] __attribute__ ((aligned (16)));
+static signed int svsi[4] __attribute__ ((aligned (16)));
+static float svf[4] __attribute__ ((aligned (16)));
+
+static void check_arrays ()
+{
+ check (svuc[9] == 9, "svuc");
+ check (svsc[14] == 6, "svsc");
+ check (svus[7] == 7, "svus");
+ check (svss[1] == -3, "svss");
+ check (svui[3] == 3, "svui");
+ check (svsi[2] == 0, "svsi");
+ check (svf[0] == 0.0, "svf");
+}
+
+static void test ()
+{
+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector unsigned short vus = {0,1,2,3,4,5,6,7};
+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};
+ vector unsigned int vui = {0,1,2,3};
+ vector signed int vsi = {-2,-1,0,1};
+ vector float vf = {0.0,1.0,2.0,3.0};
+
+ vec_ste (vuc, 9*1, (unsigned char *)svuc);
+ vec_ste (vsc, 14*1, (signed char *)svsc);
+ vec_ste (vus, 7*2, (unsigned short *)svus);
+ vec_ste (vss, 1*2, (signed short *)svss);
+ vec_ste (vui, 3*4, (unsigned int *)svui);
+ vec_ste (vsi, 2*4, (signed int *)svsi);
+ vec_ste (vf, 0*4, (float *)svf);
+
+ check_arrays ();
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ste.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ste.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ste.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/ste.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/stl.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/stl.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/stl.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/stl.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,67 @@
+#include "harness.h"
+
+static unsigned char svuc[16] __attribute__ ((aligned (16)));
+static signed char svsc[16] __attribute__ ((aligned (16)));
+static unsigned char svbc[16] __attribute__ ((aligned (16)));
+static unsigned short svus[8] __attribute__ ((aligned (16)));
+static signed short svss[8] __attribute__ ((aligned (16)));
+static unsigned short svbs[8] __attribute__ ((aligned (16)));
+static unsigned short svp[8] __attribute__ ((aligned (16)));
+static unsigned int svui[4] __attribute__ ((aligned (16)));
+static signed int svsi[4] __attribute__ ((aligned (16)));
+static unsigned int svbi[4] __attribute__ ((aligned (16)));
+static float svf[4] __attribute__ ((aligned (16)));
+
+static void check_arrays ()
+{
+ unsigned int i;
+ for (i = 0; i < 16; ++i)
+ {
+ check (svuc[i] == i, "svuc");
+ check (svsc[i] == i - 8, "svsc");
+ check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc");
+ }
+ for (i = 0; i < 8; ++i)
+ {
+ check (svus[i] == i, "svus");
+ check (svss[i] == i - 4, "svss");
+ check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs");
+ check (svp[i] == i, "svp");
+ }
+ for (i = 0; i < 4; ++i)
+ {
+ check (svui[i] == i, "svui");
+ check (svsi[i] == i - 2, "svsi");
+ check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi");
+ check (svf[i] == i * 1.0f, "svf");
+ }
+}
+
+static void test ()
+{
+ vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255};
+ vector unsigned short vus = {0,1,2,3,4,5,6,7};
+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};
+ vector bool short vbs = {0,65535,0,65535,0,65535,0,65535};
+ vector pixel vp = {0,1,2,3,4,5,6,7};
+ vector unsigned int vui = {0,1,2,3};
+ vector signed int vsi = {-2,-1,0,1};
+ vector bool int vbi = {0,0xffffffff,0,0xffffffff};
+ vector float vf = {0.0,1.0,2.0,3.0};
+
+ vec_stl (vuc, 0, (vector unsigned char *)svuc);
+ vec_stl (vsc, 0, (vector signed char *)svsc);
+ vec_stl (vbc, 0, (vector bool char *)svbc);
+ vec_stl (vus, 0, (vector unsigned short *)svus);
+ vec_stl (vss, 0, (vector signed short *)svss);
+ vec_stl (vbs, 0, (vector bool short *)svbs);
+ vec_stl (vp, 0, (vector pixel *)svp);
+ vec_stl (vui, 0, (vector unsigned int *)svui);
+ vec_stl (vsi, 0, (vector signed int *)svsi);
+ vec_stl (vbi, 0, (vector bool int *)svbi);
+ vec_stl (vf, 0, (vector float *)svf);
+
+ check_arrays ();
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/stl.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/stl.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/stl.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/stl.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sum2s.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sum2s.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sum2s.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sum2s.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,13 @@
+#include "harness.h"
+
+static void test()
+{
+ vector signed int vsia = {-10,1,2,3};
+ vector signed int vsib = {100,101,102,-103};
+ vector signed int vsir;
+ vector signed int vsier = {0,92,0,-98};
+
+ vsir = vec_sum2s (vsia, vsib);
+
+ check (vec_all_eq (vsir, vsier), "vsir");
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sum2s.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sum2s.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sum2s.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sum2s.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sums.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sums.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sums.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sums.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,12 @@
+#include "harness.h"
+
+static void test()
+{
+ vector signed int va = {-7,11,-13,17};
+ vector signed int vb = {0,0,0,128};
+ vector signed int evd = {0,0,0,136};
+
+ vector signed int vd = vec_sums (va, vb);
+
+ check (vec_all_eq (vd, evd), "sums");
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sums.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sums.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sums.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/sums.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/unpack.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/unpack.c?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/unpack.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/unpack.c Thu Jun 5 13:12:53 2014
@@ -0,0 +1,67 @@
+#include "harness.h"
+
+#define BIG 4294967295
+
+static void test()
+{
+ /* Input vectors. */
+ vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
+ vector bool char vbc = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255};
+ vector pixel vp = {(0<<15) + (1<<10) + (2<<5) + 3,
+ (1<<15) + (4<<10) + (5<<5) + 6,
+ (0<<15) + (7<<10) + (8<<5) + 9,
+ (1<<15) + (10<<10) + (11<<5) + 12,
+ (1<<15) + (13<<10) + (14<<5) + 15,
+ (0<<15) + (16<<10) + (17<<5) + 18,
+ (1<<15) + (19<<10) + (20<<5) + 21,
+ (0<<15) + (22<<10) + (23<<5) + 24};
+ vector signed short vss = {-4,-3,-2,-1,0,1,2,3};
+ vector bool short vbs = {0,65535,65535,0,0,0,65535,0};
+
+ /* Result vectors. */
+ vector signed short vsch, vscl;
+ vector bool short vbsh, vbsl;
+ vector unsigned int vuih, vuil;
+ vector signed int vsih, vsil;
+ vector bool int vbih, vbil;
+
+ /* Expected result vectors. */
+ vector signed short vschr = {-8,-7,-6,-5,-4,-3,-2,-1};
+ vector signed short vsclr = {0,1,2,3,4,5,6,7};
+ vector bool short vbshr = {0,65535,65535,0,0,0,65535,0};
+ vector bool short vbslr = {65535,0,0,65535,65535,65535,0,65535};
+ vector unsigned int vuihr = {(0<<24) + (1<<16) + (2<<8) + 3,
+ (65535<<24) + (4<<16) + (5<<8) + 6,
+ (0<<24) + (7<<16) + (8<<8) + 9,
+ (65535<<24) + (10<<16) + (11<<8) + 12};
+ vector unsigned int vuilr = {(65535<<24) + (13<<16) + (14<<8) + 15,
+ (0<<24) + (16<<16) + (17<<8) + 18,
+ (65535<<24) + (19<<16) + (20<<8) + 21,
+ (0<<24) + (22<<16) + (23<<8) + 24};
+ vector signed int vsihr = {-4,-3,-2,-1};
+ vector signed int vsilr = {0,1,2,3};
+ vector bool int vbihr = {0,BIG,BIG,0};
+ vector bool int vbilr = {0,0,BIG,0};
+
+ vsch = vec_unpackh (vsc);
+ vscl = vec_unpackl (vsc);
+ vbsh = vec_unpackh (vbc);
+ vbsl = vec_unpackl (vbc);
+ vuih = vec_unpackh (vp);
+ vuil = vec_unpackl (vp);
+ vsih = vec_unpackh (vss);
+ vsil = vec_unpackl (vss);
+ vbih = vec_unpackh (vbs);
+ vbil = vec_unpackl (vbs);
+
+ check (vec_all_eq (vsch, vschr), "vsch");
+ check (vec_all_eq (vscl, vsclr), "vscl");
+ check (vec_all_eq (vbsh, vbshr), "vbsh");
+ check (vec_all_eq (vbsl, vbslr), "vbsl");
+ check (vec_all_eq (vuih, vuihr), "vuih");
+ check (vec_all_eq (vuil, vuilr), "vuil");
+ check (vec_all_eq (vsih, vsihr), "vsih");
+ check (vec_all_eq (vsil, vsilr), "vsil");
+ check (vec_all_eq (vbih, vbihr), "vbih");
+ check (vec_all_eq (vbil, vbilr), "vbil");
+}
Added: test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/unpack.reference_output
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/unpack.reference_output?rev=210277&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/unpack.reference_output (added)
+++ test-suite/trunk/SingleSource/UnitTests/Vector/Altivec/unpack.reference_output Thu Jun 5 13:12:53 2014
@@ -0,0 +1 @@
+exit 0
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